PIC18F6390 Datasheet, PDF (408/412 Pages) Microchip Technology – 64/80-Pin Flash Microcontrollers with LCD Driver and nanoWatt Technology

PIC18F6390/6490/8390/8490
Type-A in 1/2 Mux, 1/3 Bias Drive ........................... 268
Type-A in 1/3 Mux, 1/2 Bias Drive ........................... 270
Type-A in 1/3 Mux, 1/3 Bias Drive ........................... 272
Type-A in 1/4 Mux, 1/3 Bias Drive ........................... 274
Type-A/Type-B in Static Drive .................................. 265
Type-B in 1/2 Mux, 1/2 Bias Drive ........................... 267
Type-B in 1/2 Mux, 1/3 Bias Drive ........................... 269
Type-B in 1/3 Mux, 1/2 Bias Drive ........................... 271
Type-B in 1/3 Mux, 1/3 Bias Drive ........................... 273
Type-B in 1/4 Mux, 1/3 Bias Drive ........................... 275
USART Synchronous Receive
(Master/Slave) .................................................. 384
USART Synchronous Transmission
(Master/Slave) .................................................. 384
Timing Diagrams and Specifications
AC Characteristics - Internal RC Accuracy .............. 371
Capture/Compare/PWM Requirements
(All CCP Modules) ........................................... 375
CLKO and I/O Requirements ................................... 372
Example SPI Mode Requirements
(Master Mode, CKE = 0) .................................. 376
Example SPI Mode Requirements
(Master Mode, CKE = 1) .................................. 377
Example SPI Mode Requirements
(Slave Mode, CKE = 0) .................................... 378
Example SPI Slave Mode
Requirements (CKE = 1) .................................. 379
External Clock Requirements .................................. 370
I²C Bus Data Requirements
(Slave Mode) .................................................... 381
I²C Bus Start/Stop Bits Requirements
(Slave Mode) .................................................... 380
Master SSP I²C Bus Data Requirements ................ 383
Master SSP I²C Bus Start/Stop Bits
Requirements ................................................... 382
PLL Clock ................................................................. 371
Reset, Watchdog Timer, Oscillator
Start-up Timer, Power-up Timer and
Brown-out Reset Requirements ...................... 373
Timer0 and Timer1 External
Clock Requirements ........................................ 374
USART Synchronous Receive Requirements ......... 384
USART Synchronous Transmission
Requirements .................................................. 384
Top-of-Stack Access .......................................................... 66
TSTFSZ ........................................................................... 335
Two-Speed Start-up ................................................. 281, 289
Two-Word Instructions
Example Cases .......................................................... 70
TXSTA1 Register
BRGH Bit ................................................................. 201
TXSTA2 Register
BRGH Bit ................................................................. 220
V
Voltage Reference Specifications .................................... 366
W
Watchdog Timer (WDT) ........................................... 281, 287
Associated Registers ............................................... 288
Control Register ....................................................... 287
During Oscillator Failure .......................................... 290
Programming Considerations .................................. 287
WCOL ...................................................... 185, 186, 187, 190
WCOL Status Flag ................................... 185, 186, 187, 190
WWW, On-Line Support ...................................................... 5
X
XORLW ............................................................................ 335
XORWF ........................................................................... 336
DS39629B-page 406
Preliminary
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