PIC18F6390 Datasheet, PDF (125/412 Pages) Microchip Technology – 64/80-Pin Flash Microcontrollers with LCD Driver and nanoWatt Technology

PIC18F6390/6490/8390/8490
TABLE 9-12: PORTF FUNCTIONS
Pin Name
Function
TRIS
Setting
I/O
Buffer
Description
RF0/AN5/
SEG18
RF0
0
O
DIG LATF<0> data output. Output is unaffected by analog input; disabled
when LCD segment is enabled.
1
I
ST PORTF<0> data input. Reads ‘0’ on POR.
AN5
1
I
ANA A/D input channel 5. Default configuration on POR.
SEG18
x
O
ANA Segment 18 analog output for LCD.
RF1/AN6/
RF1
0
O
DIG LATF<1> data output. Output is unaffected by analog input; disabled
C2OUT/SEG19
when LCD segment is enabled.
1
I
ST PORTF<1> data input. Reads ‘0’ on POR.
AN6
1
I
ANA A/D input channel 6. Default configuration on POR.
C2OUT
0
O
DIG Comparator 2 output; takes priority over port data.
SEG19
x
O
ANA Segment 19 analog output for LCD.
RF2/AN7/
RF2
0
O
DIG LATF<2> data output. Output is unaffected by analog input; disabled
C1OUT/SEG20
when LCD segment is enabled.
1
I
ST PORTF<2> data input. Reads ‘0’ on POR.
AN7
1
I
ANA A/D input channel 7. Default configuration on POR.
C1OUT
0
O
TTL Comparator 1 output; takes priority over port data.
SEG20
x
O
ANA Segment 20 analog output for LCD.
RF3/AN8/
SEG21
RF3
0
O
DIG LATF<3> data output. Output is unaffected by analog input; disabled
when LCD segment is enabled.
1
I
ST PORTF<3> data input. Reads ‘0’ on POR.
AN8
1
I
ANA A/D input channel 8 and Comparator C2+ input. Default input
configuration on POR; not affected by analog output.
SEG21
x
O
ANA Segment 21 analog output for LCD.
RF4/AN9/
SEG22
RF4
0
O
DIG LATF<4> data output. Output is unaffected by analog input; disabled
when LCD segment is enabled.
1
I
ST PORTF<4> data input. Reads ‘0’ on POR.
AN9
1
I
ANA A/D input channel 9 and Comparator C2- input. Default input
configuration on POR; does not affect digital output.
SEG22
x
O
ANA Segment 22 analog output for LCD.
RF5/AN10/
RF5
0
O
DIG LATF<5> data output. Output unaffected by analog input; disabled
CVREF/SEG23
when either LCD segment or CVREF is enabled.
1
I
ST PORTF<5> data input. Reads ‘0’ on POR.
AN10
1
I
ANA A/D input channel 10 and Comparator C1+ input. Default input
configuration on POR.
CVREF
0
O
ANA Comparator voltage reference output. Enabling this feature disables
digital I/O.
SEG23
x
O
ANA Segment 23 analog output for LCD.
RF6/AN11/
SEG24
RF6
0
O
DIG LATF<6> data output. Output unaffected by analog input; disabled
when LCD segment is enabled.
1
I
ST PORTF<6> data input. Reads ‘0’ on POR.
AN11
1
I
ANA A/D input channel 11 and Comparator C1- input. Default input
configuration on POR; does not affect digital output.
SEG24
x
O
ANA Segment 24 analog output for LCD.
RF7/SS/SEG25
RF7
0
O
DIG LATF<7> data output; disabled when LCD segment is enabled.
1
I
ST PORTF<7> data input.
SS
1
I
TTL Slave select input for SSP (MSSP module).
SEG25
x
O
ANA Segment 25 analog output for LCD.
Legend: PWR = Power Supply, O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Buffer Input,
TTL = TTL Buffer Input, x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
 2004 Microchip Technology Inc.
Preliminary
DS39629B-page 123