ISL78226 Datasheet, PDF (9/94 Pages) Intersil Corporation – Cycle-by-cycle peak current limiting

ISL78226
Pin Description (Continued)
PIN NAME
ISEN6A
ISEN6B
ADDR
MODE
SLOPE_BT
SLOPE_BK
FB_BT
FB_BK
COMP_BT
I/O PIN #
DESCRIPTION
I
47 Current Sense Amplifier (CSA) 6 input. With a combination of ISEN6B and gain setting resistors, R_SET6A and R_SET6B, the
current flowing at Current Sense Resistor-6 will be converted to the sensed current signal and forwarded into the device.
Connect ISEN6A at the negative side of Current Sense Resistor-6 in Buck mode configuration. Ultimately senses the
BAT12 voltage side of the current sensing shunt through the filter, refer to Figure 4. The resistive shunt MUST be Kelvin
connected, do not allow this connection to take place anywhere else on the BAT12 plane. The sensed current information
is used for peak current mode control, average current control, and overcurrent protections. If this phase is not used,
connect the ISEN6A to BAT12.
I 48 The other side of Current Sense Amplifier (CSA) 6 input. With a combination of ISEN6A and gain setting resistors, R_SET6A
and R_SET6B, the current flowing at Current Sense Resistor-6 will be converted to the sensed current signal and forwarded
into the device. Connect ISEN6B at the positive side of Current Sense Resistor-6 in Buck mode configuration. Ultimately
senses the inductor side of the current sensing shunt through the filter, refer to Figure 4. The resistive shunt MUST be
Kelvin connected. The sensed current information is used for peak current mode control, average current control, and
overcurrent protections. If this phase is not used, float or do not connect the ISEN6B pin.
I 49 Controller address configuration pin. At the initialization phase, the device forces 30µA constant current at this pin and
determines the order of the device (master, slave-1, salve-2, slave-3) by the setting of this pin.
If this pin is connected to GND directly, the device operates as Master.
If this pin is connected to VCC directly, the device operates as Slave-1.
If a 33.2k or 68.1kresistor is connected between this pin and GND, the device operates as Slave-2 and Slave-3,
respectively.
I 50 The MODE pin determines the operation switching mode (Diode Emulation (DE) mode or Forced PWM mode) and fault
response (hiccup or latch-off) at the initialization period of device startup. To select the proper operation mode, connect
a resistor between this pin to GND or directly connect to VCC or GND. This pin sources 30uA current while in initialization
period.
If the pin is connected to GND directly, the device operates in DE mode and has Hiccup fault response.
If a 33.2kΩ resistor is connected between this pin and GND, the device operates in DE mode and Latch-off fault response.
If a 68.1kΩ resistor is connected between this pin and GND, the device operates in PWM mode and has Hiccup fault
response.
If this pin is directly connected to VCC, the device operates in Forced PWM mode and Latch-off fault response. DE and
Forced PWM mode cannot be changed by internal register options once selected at EN.
I 51 This pin programs the slope of the internal slope compensation for Boost mode operation. A resistor should be
connected from the SLOPE_BT pin to GND. When BT/BK pin is high, this pin is activated. Slope resistor value setting and
selection guidance is provided in the “Adjustable Slope Compensation” section on page 38.
I 52 This pin programs the slope of the internal slope compensation for Buck mode operation. A resistor should be connected from
the SLOPE_BK pin to GND. When BT/BK pin is low, this pin is activated. Slope resistor value setting and selection guidance
is provided in the “Adjustable Slope Compensation” section on page 38.
I 53 The inverting input of the transconductance amplifier for Boost mode operation and the input for BAT48 rail monitoring.
A resistor voltage divider must be placed between the FB_BT pin, the BAT48 rail, and GND to set the Boost mode output
voltage and to monitor the BAT48 rail voltage. When configured as Master and BT/BK pin is high, this function will be
activated.
When configured as slave device, the combination of FB_BT and FB_BK determines the total slave device count for the
proper phase shifting. If the system is configured as 1-master/1-slave operation, connect FB_BT and FB_BK pins of slave
device to GND. If the system is configured as 1-master/2-slave operation, connect FB_BT and FB_BK pins of slave devices
to VCC. And if the system is configured as 1-master/3-slave operation, connect FB_BT and FB_BK pins of slave devices
to GND and VCC, respectively.
I 54 The inverting input of the transconductance amplifier for Buck mode operation and the input for BAT12 rail monitoring.
A resistor voltage divider must be placed between the FB_BK pin, the BAT12 rail, and GND to set the Buck mode output
voltage and to monitor the BAT12 rail voltage. When configured as master and BT/BK pin is low, this pin is activated.
When configured as Slave device, the combination of FB_BT and FB_BK determines the total slave device count for the
proper phase shifting. If the system is configured as 1-master/1-slave operation, connect FB_BT and FB_BK pins of slave
device to GND. If the system is configured as 1-master/2-slave operation, connect FB_BT and FB_BK pins of slave devices
to VCC. And if the system is configured as 1-master/3-slave operation, connect FB_BT and FB_BK pins of slave devices
to GND and VCC, respectively.
I/O 55 The output of the transconductance amplifier for Boost mode operation. Place the compensation network between the
COMP_BT pin and GND for compensation loop design. When BT/BK pin is high, this function will be activated. For setting
of compensation network, refer to “Adjustable Slope Compensation” on page 38.
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FN8887.0
November 7, 2016