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ISL78226 Datasheet, PDF (57/94 Pages) Intersil Corporation – Cycle-by-cycle peak current limiting
ISL78226
INDIVIDUAL FAULT RESPONSE CONTROL REGISTER 4 (0XB4)
Definition: Flyback overcurrent and Average Overcurrent Protection (ACP) fault response setting
Data Length in Bytes: 1
Data Format: Bit Field
Typical: R/W
Protectable: Yes
Default Value: 00h
Units: N/A
REGISTER NAME
Format
Bit Position
Access
Function
Default Value
7
R/W
Flyback Switching FET
Short Protection
Control
0
INDIVIDUAL FAULT RESPONSE CONTROL REGISTER 4 (0XB4)
Bit Field
6
5
4
3
2
R/W
R/W
R/W
R/W
R/W
Reserved
Average Overcurrent
Protection Control Bits
Reserved
0
0
0
0
0
1
0
R/W
R/W
Flyback Switching FET
Overcurrent Protection
Control Bits
0
0
Flyback Primary Side Switching FET Overcurrent Protection Control Bits (0xB4: Bit 1:0)
If the individual fault response enable/disable control bit (0xB0[7]) is “1”, the device selects the fault response when detecting
overcurrent situations at the primary side switching FET of Flyback. If the individual fault response enable/disable control bit (0xB0[7])
is “0”, the “MODE” pin setting will be used for the fault control and this register setting will be ignored.
BIT1
BIT0
DESCRIPTION
0
0
Flagging only (Default)
When the overcurrent condition at primary side of switching FET of Flyback is detected, the corresponding fault
status register (0xD3[4]) will be set to “1”, and XALERT will be pulled low. The system continues to operate. No hiccup
or latch-off responses.
0
1
Hiccup (Auto Restart)
When the overcurrent condition at primary side of switching FET of Flyback is detected, the corresponding fault
status register (0xD3[4]) will be set to “1”, and XALERT will be pulled low. At the same time, the system stops
switching of Flyback and PWMx outputs. The Flyback switching will recover automatically 500ms (typical) after the
overcurrent condition is removed. The PWM switchings will recover via the normal soft-start period after the Flyback
recovery.
1
0
Latch-off
When the overcurrent condition at primary side of switching FET of Flyback is detected, the corresponding fault
status register (0xD3[4]) will be set to “1”, and XALERT will be pulled low. At the same time, the system stops
switching of Flyback and PWMx outputs. The Flyback switching will not recover automatically even the overcurrent
condition is removed. To recover switching, toggle EN. Also, to restart PWMx switching, set PWM_EN to “high” after
the Flyback restart and V6/V12 will become a proper level.
1
1
Flagging only (same as “0,0”)
Submit Document Feedback 57
FN8887.0
November 7, 2016