ISL78226 Datasheet, PDF (56/94 Pages) Intersil Corporation – Cycle-by-cycle peak current limiting

ISL78226
V6 Overvoltage Fault Control Bit (0xB3: Bit 5:4)
When the individual fault response enable/disable control bit (0xB0[7]) is “1”, the device selects the fault response when V6 voltage
exceeds the overvoltage threshold. When the individual fault response enable/disable control bit (0xB0[7]) is “0”, the “MODE” pin
setting will be used for the fault control and this register setting will be ignored.
BIT1
BIT0
DESCRIPTION
0
0
Flagging only (Default)
When V6 voltage exceeds the overvoltage threshold, the corresponding fault status register (0xD3[0]) will be set to
“1”, and XALERT will be pulled low. The system continues to operate. No hiccup or latch-off responses.
0
1
Hiccup (Auto Restart)
When V6 voltage exceeds the overvoltage threshold, the corresponding fault status register (0xD3[0]) will be set to
“1”, and XALERT will be pulled low. At the same time, the system stops PWM switching. The PWM switching will
recover automatically 500ms (typical) after the overvoltage condition is removed.
1
0
Latch-off
When V6 voltage exceeds the overvoltage threshold, the corresponding fault status register (0xD3[0]) will be set to
“1”, and XALERT will be pulled low. At the same time, the system stops PWM switching. The PWM switching will not
recover automatically when the overvoltage condition is removed. To recover the switching, toggle PWM_EN or EN.
1
1
Flagging only (same as “0.0”)
V6 Undervoltage Fault Control Bit (0xB3: Bit 7:6)
If the individual fault response enable/disable control bit (0xB0[7]) is “1”, the device selects the fault response when V6 becomes lower
than the undervoltage threshold. If the individual fault response enable/disable control bit (0xB0[7]) is “0”, the “MODE” pin setting will
be used for the fault control and this register setting will be ignored.
BIT1
BIT0
DESCRIPTION
0
0
Flagging only (Default)
When V6 voltage becomes lower than the undervoltage threshold, the corresponding fault status register (0xD3[1])
will be set to “1”, and XALERT will be pulled low. The system continues to operate. No hiccup or latch-off responses.
0
1
Hiccup (Auto Restart)
When V6 voltage becomes lower than the undervoltage threshold, the corresponding fault status register (0xD3[1])
will be set to “1”, and XALERT will be pulled low. At the same time, the system stops PWM switching. The PWM
switching will recover automatically 500ms (typical) after the undervoltage condition is removed.
1
0
Latch-off
When V6 voltage becomes lower than the undervoltage threshold, the corresponding fault status register (0xD3[1])
will be set to “1”, and XALERT will be pulled low. At the same time, the system stops PWM switching. The PWM
switching will not recover automatically when the undervoltage condition is removed. To recover the switching, toggle
PWM_EN or EN.
1
1
Flagging only (same as “0,0”)
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FN8887.0
November 7, 2016