ISL78226 Datasheet, PDF (11/94 Pages) Intersil Corporation – Cycle-by-cycle peak current limiting

ISL78226
Ordering Information
PART
NUMBER
(Notes 1, 2, 3)
PART
MARKING
TEMP RANGE
(°C)
PACKAGE
(RoHS COMPLIANT)
PKG.
DWG. #
ISL78226ANZ
ISL78226ANZ
-40 to +125
64 Ld 10x10 EP-TQFP
Q64.10x10H
ISL78226EVKIT1Z
ISL78226 evaluation kit
NOTES:
1. Add “-T” suffix for 1k unit tape and reel option. Refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), see device information page for ISL78226. For more information on MSL, see techbrief TB363.
Block Diagram
BAT48
Duplicate for
V12
each Phase (x6)
ISL78420
DRV_EN
VDD HB
Lvl-Sft
PWM Ctrl
RDT ^Ckt
HO
HS
LO
GND
Lx
RSEN1
IS1B IS1A
Shut-off from MCU
SYS_FAIL
Emergency
Shut-off Logic
V6
V12
BAT12
SLP_FLY
RSLP-FLY
SS_FLY
CSS-FLY
COMP_FLY
OC_FLY
FLY_EN
Slope
Generator
SS_FLY
Control
VREF
Gm
FB_FLY
SLP_BK
RSLP-BK
SLP_BT
RSLP-BT
ISEN1B
BT/BK
RSEN_FLY
ISP_FLY ISN_FLY GDRV_FLY
V12
PWM_CLK
S
Q
R1
VCC
Slope Ramp
Generator
ISLOPE
V6 VIN
VIN_UVLO
BKUP_LDO
PVCC_
POR
LDO_INT
PVCC
VCC
EN
VCC
VCC_POR
VCC_ POR
BG_OK
Main BG &
VREF Gen ^VREF
PVCC
VCC_POR
PVCC_OK SYS_EN_ ^EN_SYS
V12_OK
CTRL
BG_OK
EN_FBK
PVCC_POR
VCC V12
V6
VREF
EN_SYS _{MCU_LDO}
MCU_VDD
VCC
V12_UV
VCC
V12_OV
VCC
V6_UV
VCC
V6_OV
RFBMCUVDD1
MCUVDD_FB
UVVDDMCU
RFBMCUVDD2
MCU_VD
PG_MCUVDD
OVVDDMCU
x6
FIGURE 3. BLOCK DIAGRAM -- TOP
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FN8887.0
November 7, 2016