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ISL78226 Datasheet, PDF (37/94 Pages) Intersil Corporation – Cycle-by-cycle peak current limiting
ISL78226
reference. This will not affect the output voltage because of the
limited bandwidth of the system. A 400kHz frequency is
recommended for the PWM signal at the TRACK pin. Lower
frequency as minimum at 200kHz at the TRACK input is possible,
but VREF_TRK will have higher AC ripple. A bench test evaluation
is needed to make sure the output voltage is not affected by this
VREF_TRK AC ripple.
Digital tracking is the default setting of the device, however, the
user can select the analog tracking function. When setting the
ATRK_DTRK control register (0xB0:[4] = 1) through the PMBus,
the internal MUX connects the TRACK pin voltage to the input of
the 2-stage RC filter R1/C1/R2/C2. In such a way, the TRACK pin
accepts analog signal inputs, with the Gm’s VREF_TRK input
equal to the voltage on the TRACK pin. It has the same low pass
filter with a cutoff frequency of 1.75kHz.
If not used, the TRACK pin should be left floating or tied to VCC
with the internal VREF working as the reference.
The TRACK function is enabled before the SS pin soft-start.
Therefore, the VREF_TRK can be controlled by TRACK inputs at
start-up.
The converter’s control loop bandwidth limits the maximum
reference’s (VREF_TRK) transition speed, sympathetically
limiting the output voltage tracking rate. Generally, the tracking
reference signal’s frequency should be 10 times lower than the
Boost loop crossover frequency. Otherwise, the Boost output
voltage cannot track the tracking reference signal and the output
voltage will be distorted.
Current Sense
The ISL78226 peak current control architecture senses the
inductor current continuously for fast response. A sense resistor
is placed in-series with the power inductor for each phase. The
ISL78226 Current Sense Amplifiers (CSA) continuously senses
the respective inductor current (as shown in Figure 32) by
sensing the voltage signal across the sense resistor RSENx
(where “x” indicates the specific phase number and same note
applied throughout this document). The sensed current for each
active phase will be used for peak current mode control loop,
phase current balance, individual phase cycle-by-cycle peak
current limiting (OC1), individual phase overcurrent fault
protection (OC2), Averaged Constant Current Limit (CCL) control,
and Average Overcurrent Protection (ACP), Diode Emulation (DE),
and Phase Drop/Add control. The internal circuitry shown in
Figure 32 represents a single phase and is repeated for each
phase.
BAT48
ILx
RSENx
Lx
BAT12
ISENxB
IBIAS = 56µ A
+
ISENxA
FIGURE 32. CURRENT SENSING BLOCK DIAGRAM FOR INDIVIDUAL
PHASE ISENX
The current sense resistor (RSENx) should be placed at the
non-switching side (BAT12 side) of the inductor, i.e., output side
of inductor in Buck mode and input side of inductor in Boost
mode. The ISENxA pin should be connected to the BAT12 side
(output side in Buck mode and input side in Boost mode) and
ISENxB pin should be connected to the inductor side of current
sense resistor.
The RC network between RSENx and ISENxA/B pins as shown in
Figure 32 is the recommended configuration. The current gain
setting resistor RSETx is composed by RSETxA plus RSETxB in
Figure 32 and should be fixed at 1kΩ.
RSETx = RSETxA + RSETxB
(EQ. 5)
It is recommended to have RSETxA = RBIASxA and
RSETxB = RBIASxB, and insert a capacitor, CISENx, between them
as shown in Figure 32. This will form a symmetric noise filter for
the small current sense signals. The differential filtering time
constant equals to (RSETxA+RBIASxA)*CISENx. This time constant
is typically selected in range of tens of ns depending on the
actual noise levels.
To detect the bidirectional current signal, CSA has 56mV internal
offset voltage between ISENxA and ISENxB. Also, the CSA has
internal 56µA offset current, which enables changing the polarity
of the input signal between Buck mode and Boost mode.
Therefore, to balance the zero current point properly, the total
resistor value of RSETx (RSETxA + RSETxB) needs to be set to 1kΩ
in the application circuit. With this setting, the CSA output
current ISENx is proportional to each phase inductor current ILx
and enables detection of both positive and negative direction
current at the inductor. ISENx per phase can be derived in
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FN8887.0
November 7, 2016