ISL78226 Datasheet, PDF (45/94 Pages) Intersil Corporation – Cycle-by-cycle peak current limiting

ISL78226
warning flags, auto/start, hiccup or latch-off functions, as the
response to faults. The hiccup or latch-off response can be
selected by configuring the MODE pin, or can be overridden by
setting corresponding control register bits. Also, the fault status
can be read out by an external microcontroller via I²C/PMBus
interface.
12V/48V (BAT12/BAT48) RAIL INPUT/OUTPUT
OVERVOLTAGE AND UNDERVOLTAGE FAULT
The ISL78226 has two levels of overvoltage/undervoltage
detection for each input case and output case at the 12V and
48V rails. When the 12V and/or 48V battery voltage becomes
higher than the overvoltage warning threshold or lower than the
undervoltage warning threshold, the ISL78226 sets the
corresponding status register bit (0x80: BAT12/BAT48
Over/Undervoltage Status Register) to indicate the fault
condition and pull down the XSTAT_FLAG (an alert flag). The
XSTAT_FLAG alerts the external microcontroller to the fault
detection. The external microcontroller can read out the status
register bits (0x80: BAT12/BAT48 Over/Undervoltage Status
Register) via I²C/PMBus to recognize the fault condition.
In the default setting, the BAT12 Input or Output Overvoltage
Warning Threshold is set at 115% of the target voltage, the
BAT12 Undervoltage Warning Threshold is set at 85% of the
target voltage, the BAT48 Overvoltage Warning Threshold is set
at 108% of the target voltage, and BAT48 Undervoltage Warning
is set at 85% of the target voltage. These thresholds can be
overridden by setting the corresponding Fault Threshold Control
Registers (0x20[2,0]: BAT12 Overvoltage Warning Threshold
Control Register, 0x21[2,0]: BAT12 Undervoltage Warning
Threshold Control Register, 0x22[2,0] BAT48 Overvoltage
Warning Threshold Control Register, and 0x21[5,3]: BAT48
Undervoltage Warning Threshold Control Register).
The fault response of over/undervoltage warning can be
overridden by setting the corresponding control register bits
(0x00[7]: Individual Fault Response Setting bit, 0x01: BAT12
Over/Undervoltage Limit Fault Response Control Register, 0x02:
BAT48 Over/Undervoltage Limit Fault Response Control
Register).
If the overvoltage or undervoltage conditions reach the second
threshold, which is the maximum or minimum operation voltage
limit, the device sets the corresponding fault status register
(0x85: BAT12/BAT48 Over/Undervoltage Limit Status Register),
pulls down the XSTAT_FLAG, and move into the Hiccup or Latch-
off mode that is defined by the MODE pin. The fault response
defined by MODE pin can be overridden by setting the
corresponding control register bits (0x00[7]: Individual Fault
Response Setting bit, 0x07: Bat12 Over/Undervoltage Limit Fault
Response Control Register, 0x08: BAT48 Over/Undervoltage
Limit Fault Response Control Register).
If the device moves into Hiccup mode by the BAT12 or BAT48
Over/Undervoltage Limit, the device stops the main controller
switching but keeps the Flyback controller, Internal LDOs, and
MCU_LDO active. After the 500ms interval, the device restarts
automatically from soft-start. If the device moves into Latch-off
mode by the BAT12 or BAT48 Over/Undervoltage Limit, the
device stops the main controller but keeps the Flyback controller,
Internal LDOs, and MCU_LDO active, and waits for the toggling of
the EN_PWM or EN pin. If the EN_PWM is toggled, the main
controller will restart from soft-start. If the EN pin is toggled, the
device stops the Flyback controller, internal LDOs, and MCU_LDO
once, and restarts from the device initialization.
In the default setting, the BAT12 Input or Output Overvoltage
Limit Threshold is set at 150% of the target voltage, the BAT12
Undervoltage Limit Threshold is set at 40% of the target voltage,
the BAT48 Overvoltage Limit Threshold is set at 125% of the
target voltage, and BAT48 Undervoltage Limit Threshold is set at
50% of the target voltage. These thresholds can be overridden by
setting the corresponding Fault Threshold Control Registers
(0x20[5,3]: BAT12 Overvoltage Limit Threshold Control Register
and 0x22[5,3] BAT48 Overvoltage Warning Threshold Control
Register).
VIN OVERVOLTAGE PROTECTION
In typical application, the ISL78226 is powered by the BAT12
and/or BAT48 rail at VIN pin for the initial start up. To prevent a
VIN overvoltage condition, it is recommended to put a 55V or
lower clamp circuit at the VIN pin. To prevent the device
operation when the VIN is higher than 55V, the ISL78226 has
overvoltage protection at the VIN pin.
If the VIN pin voltage becomes higher than 66V, the device sets
the corresponding fault status register (0x81[5]: VIN Overvoltage
Limit Status Register), pulls down the XSTAT_FLAG, and moves
into the Hiccup or Latch-off mode that is defined by the MODE
pin. The fault response defined by the MODE pin can be
overridden by setting the corresponding control register bits
(0x00[7]: Individual Fault Response Setting bit, 0x04[3,2]: VIN
Overvoltage Limit Fault Response Control Register).
If the device moves into Hiccup mode by VIN Overvoltage Limit,
the device stops the switching of the main controller, Flyback
controller, internal LDOs, and MCU_LDO. After the 500ms
interval and when the VIN becomes lower than 54.5V, the device
restarts automatically from device initialization. If the device
moves into Latch-off mode by VIN Overvoltage Limit, the device
stops the main controller, Flyback controller, internal LDOs, and
MCU_LDO, and waits for the toggling of the EN pin. When the EN
pin is toggled, the device will restart from the device
initialization.
FLYBACK OUTPUT (V12/V6) OVER/UNDERVOLTAGE
DETECTION AND PROTECTION
The ISL78226 has a Flyback controller to generate the power
supply voltages for external drivers (V12 = 12V) and ISL78226
itself (V6 = 6V) from the 12V and/or 48V battery. These voltages
may vary widely around 6V to 55V. The ISL78226 has
overvoltage/undervoltage detection/protection for the Flyback
outputs (V6 and V12).
If the V12 voltage exceed 130% of the target voltage (16V), or V6
becomes higher than 12V, the device sets the corresponding
fault status register (0x81[2]: V12 Overvoltage Limit Status
Register, 0x81[0]: V6 Overvoltage Limit Status Register), pulls
down the XSTAT_FLAG, and moves into the Hiccup or Latch-off
mode that is defined by the MODE pin. The fault response
defined by the MODE pin can be overridden by setting the
corresponding control register bits (0x00[7]: Individual Fault
Response Setting bit, 0x03[1,0]: V12 Overvoltage Limit Fault
Submit Document Feedback ₄₅
FN8887.0
November 7, 2016