ISL78226 Datasheet, PDF (26/94 Pages) Intersil Corporation – Cycle-by-cycle peak current limiting

ISL78226
Electrical Specifications Refer to the Block Diagram (page 11) and Typical Application Schematics (page 13). Operating conditions
unless otherwise noted: V_VIN = 48V, V_V6 = 6V, V_V12 = 12V, V_BAT12 = 12V, V_PVCC = 5.2V, V_VCC = 5.2V, V_EN = 5.0V, and T_A = -40°C to +125°C. Typicals are
at T_A = +25°C. Boldface limits apply across the operating temperature range, -40°C to +125°C. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
MAX
(Note 8) TYP (Note 8) UNIT
BAT12 AND BAT48 OVERVOLTAGE DETECTION AND PROTECTION
BAT12 Overvoltage Fault Detection
Threshold at FB_BK Pin. (Rising)
(Percentage to the Internal Reference
Voltage (1.6V))
V_{BAT12_OV}
Default setting: Individual Fault Response
Control Register Bit (0x00[7]) = 0,
Internal Fault Flag setting and XSTAT_VLAG
falling
112 115 118
%
Register Setting: Individual Fault Response
112 115 118
%
Control Register Bit (0x00[7]) = 1,
BAT12_Overvoltage Detection Control Register
(0x20[2:0]) = 000
0x00[7] = 1, 0x20[2:0] = 001
110
%
0x00[7] = 1, 0x20[2:0] = 010
120
%
0x00[7] = 1, 0x20[2:0] = 011
125
%
0x00[7] = 1, 0x20[2:0] = 100
130
%
0x00[7] = 1, 0x20[2:0] = 101
135
%
0x00[7] = 1, 0x20[2:0] = 110
140
%
0x00[7] = 1, 0x20[2:0] = 111
145
%
BAT12 Overvoltage Protection Threshold
at FB_BK Pin. (Rising)
V_{BAT12_OVP} Default setting: Individual Fault Response
Control Register Bit (0x00[7]) = 0,
146 150 153
%
(Percentage to the Internal Reference
Internal fault bit setting, XSTAT_FLAG and
Voltage (1.6V))
XHIC_LAT_F falling, hiccup or latch-off response
Register setting: Individual Fault Response
Control Register Bit (0x00[7]) = 1,
BAT12_Overvoltage Limit Control Register
(0x20[5:3]) = 000
146 150 153
%
0x00[7] = 1, 0x20[5:3] = 001
140
%
0x00[7] = 1, 0x20[5:3] = 010
130
%
0x00[7] = 1, 0x20[5:3] = 011
160
%
0x00[7] = 1, 0x20[5:3] = 100
170
%
0x00[7] = 1, 0x20[5:3] = 101
180
%
0x00[7] = 1, 0x20[5:3] = 110
190
%
0x00[7] = 1, 0x20[5:3] = 111
200
%
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FN8887.0
November 7, 2016