I347-AT4 Datasheet, PDF (92/148 Pages) Intel Corporation – Intel® Ethernet Network Connection I347-AT4 Datasheet

I347-AT4—Programmer’s Visible State
Bits
14
13
12
11:0
Field
Mode
1000BASE-X
Half-Duplex
RO
1000BASE-T Full-
Duplex
RO
1000BASE-T
Half-Duplex
RO
Reserved
RO
HW Rst SW Rst
Description
See
Descr
See
Descr
If register 16_1.1:0 (MODE[1:0]) = 00 then this bit is 0, else
this bit is 1.
1 = 1000BASE-X half-duplex capable
0 = Not 1000BASE-X half-duplex capable
0x0
0x0
0 = Not 1000BASE-T full-duplex capable
0x0
0x000
0x0
0x000
0 = Not 1000BASE-T half-duplex capable
000000000000
4.1.25 PRBS Control - Page 1, Register 23
Bits
15:8
7
6
5
4
3:2
1
0
Field
Reserved
Invert Checker
Polarity
Invert Generator
Polarity
PRBS Lock
Clear Counter
Reserved
PRBS Checker
Enable
PRBS Generator
Enable
Mode
HW Rst SW Rst
Description
R/W
R/W
0x00
0x0
R/W
0x0
R/W
0x0
R/W, SC 0x0
R/W
0x0
R/W
0x0
R/W
0x0
Retain
Retain
Retain
Retain
0x0
Retain
0x0
0x0
Set to 0s
0 = Invert
1 = Normal
0 = Invert
1 = Normal
0 = Counter Free Runs
1 = Do not start counting until PRBS locks first
0 = Normal
1 = Clear Counter
Set to 0s
0 = Disable
1 = Enable
0 = Disable
1 = Enable
4.1.26 PRBS Error Counter LSB - Page 1, Register 24
Bits
Field
15:0
PRBS Error
Count LSB
Mode
RO
HW
Rst
0x0000
SW Rst
Description
Retain
A read to this register freezes register 25_1.
Cleared only when register 23_1.4 is set to 1.
4.1.27 PRBS Error Counter MSB - Page 1, Register 25
Bits
15:0
Field
Mode
PRBS Error Count
MSB
RO
HW Rst SW Rst
Description
0x0000 Retain
This register does not update unless register 24_1 is read
first.
Cleared only when register 23_1.4 is set to 1.
82