I347-AT4 Datasheet, PDF (71/148 Pages) Intel Corporation – Intel® Ethernet Network Connection I347-AT4 Datasheet

Device Functionality—I347-AT4
3.25.2
Reference Clock Select
The 25 MHz reference clock source to the copper unit is independently selectable per
port. On hardware reset XTAL_IN or REF_CLKP/N is selected as the reference clock
source for all ports. SCLK can be selected as the reference clock source on a per port
basis.
Register 16_2.7 selects whether the reference clock for the copper interface is based
on XTAL_IN/REF_CLKP/N or SCLK. 0b = XTAL_IN or REF_CLKP/N, 1b = SCLK.
Register 16_2.6 selects whether the reference clock for the 1.25 GHz SERDES interface
is based on XTAL_IN/REF_CLKP/N or SCLK. 0 = XTAL_IN or REF_CLKP/N, 1 = SCLK.
The CLK_SEL[1:0] must be set to 11b in order to do the reference clock selection.
Since changing the reference clocks disturbs the PHY, a software reset must be issued
before any change to the clock select takes place.
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