I347-AT4 Datasheet, PDF (17/148 Pages) Intel Corporation – Intel® Ethernet Network Connection I347-AT4 Datasheet

Pin Interface—I347-AT4
Table 7.
Pin #
A11
B11
A12
B12
Table 8.
Pin #
B14
A14
B13
A13
SGMII Interface Port 2
Pin Name
Pin
Type
Description
P2_S_INP
P2_S_INN
I
SGMII Transmit Data. 1.25 GBaud input - Positive and Negative.
P2_S_OUTP
P2_S_OUTN
O
SGMII Receive Data. 1.25 GBaud output - Positive and Negative.
Output amplitude can be adjusted via register 26_1.2:0.
SGMII Interface Port 3
Pin Name
Pin
Type
Description
P3_S_INP
P3_S_INN
I
P3_S_OUTP
P3_S_OUTN
O
SGMII Transmit Data. 1.25 GBaud input - Positive and Negative.
SGMII Receive Data. 1.25 GBaud output - Positive and Negative.
Output amplitude can be adjusted via register 26_1.2:0.
2.1.4
Reserved Pins
Pin #
B9
A9
A8
B8
Pin Name
RSVD_NC
RSVD_NC
RSVD_NC
RSVD_NC
Pin
Type
I
Reserved, do not connect.
O
Reserved, do not connect.
Description
2.1.5
Management/Control
Pin #
Pin Name
B6
MDC
A6
MDIO
D2
INTn
Pin
Type
I
I/O
OD
Description
Management Clock pin.
MDC is the management data clock reference for the serial management
interface. A continuous clock stream is not expected. The maximum frequency
supported is 12 MHz.
Management Data pin.
MDIO is the management data. MDIO transfers management data in and out of
the device synchronously to MDC. This pin requires a pull-up resistor in a range
from 1.5 KΩ to 10 KΩ.
Interrupt pin.
The pull-up resistor used for the INTn must be connected to the VDDOL level.
The pull-up resistor should not be connected to voltage higher than VDDOL.
7