I347-AT4 Datasheet, PDF (50/148 Pages) Intel Corporation – Intel® Ethernet Network Connection I347-AT4 Datasheet

I347-AT4—Device Functionality
Table 17. Media Dependent Interface Pin Mapping
MDI
MDIX
Pin
1000BASE-T
100BASE-TX
10BASE-T
1000BASE-T
100BASE-TX
10BASE-T
MDIP/N[0]
MDIP/N[1]
MDIP/N[2]
MDIP/N[3]
BI_DA±
BI_DB±
BI_DC±
BI_DD±
TX±
RX±
unused
unused
TX±
RX±
unused
unused
BI_DB±
BI_DA±
BI_DD±
BI_DC±
RX±
TX±
unused
unused
RX±
TX±
unused
unused
Note:
Table 17 assumes no crossover on PCB.
The MDI/MDIX status is indicated by Register 17_0.6. This bit indicates whether the
receive pairs (3, 6) and (1, 2) are crossed over. In 1000BASE-T operation, the I347-AT4
can correct for crossover between pairs (4, 5) and (7, 8) as listed in Table 17. However,
this is not indicated by Register 17_0.6.
If 1000BASE-T link is established, pairs (1, 2) and (3, 6) crossover is reported in
register 21_5.4, and pairs (4, 5) and (7, 8) crossover is reported in register 21_5.5.
3.16
Unidirectional Transmit
IEEE 802.3ah requires OAM support with unidirectional transmit capability.
Unidirectional transmit enables a PHY to transmit data when the PHY does not have link
due to potential issues on the receive path. 802.3ah formally requires two bits for this
capability. Register 0.5 enables this capability, and 1.7 advertises this ability. This
ability only applies to 100BASE-TX or 1000BASE-X. It doesn’t apply to 1000BASE-T
since 1000BASE-T requires Master/Slave relationship and training with both link
partners participating, which requires that link exists for any data transmit.
The I347-AT4 supports transmits of packets when there is no link by using register bit
16_0.10 = 1b (Force Copper Link Good). This is not the official bit specified by the
802.3ah but serves the same function.
3.17
Polarity Correction
The I347-AT4 automatically corrects polarity errors on the receive pairs in 1000BASE-T
and 10BASE-T modes. In 100BASE-TX mode, the polarity does not matter.
In 1000BASE-T mode, receive polarity errors are automatically corrected based on the
sequence of idle symbols. Once the descrambler is locked, the polarity is also locked on
all pairs. The polarity becomes unlocked only when the receiver loses lock.
In 10BASE-T mode, polarity errors are corrected based on the detection of validly
spaced link pulses. The detection begins during the MDI crossover detection phase and
locks when the 10BASE-T link is up. The polarity becomes unlocked when link is down.
The polarity correction status is indicated by Register 17_0.1. This bit indicates whether
the receive pair (3, 6) is polarity reversed in MDI mode of operation. In MDIX mode of
operation, the receive pair is (1, 2) and Register 17_0.1 indicates whether this pair is
polarity reversed. Although all pairs are corrected for receive polarity reversal, Register
17_0.1 only indicates polarity reversal on the pairs described above.
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