I347-AT4 Datasheet, PDF (30/148 Pages) Intel Corporation – Intel® Ethernet Network Connection I347-AT4 Datasheet

I347-AT4—Device Functionality
3.2.4.2
100BASE-TX
In 100BASE-TX mode, the receive data stream is recovered and converted to NRZ. The
NRZ stream is descrambled and aligned to the symbol boundaries. The aligned data is
put in parallel and then 5B/4B decoded. The receiver does not attempt to decode the
data stream unless the scrambler is locked. The descrambler “locks” to the scrambler
state after detecting a sufficient number of consecutive idle code-groups. Once locked,
the descrambler continuously monitors the data stream to make sure that it has not
lost synchronization. The descrambler is always forced into the unlocked state when a
link failure condition is detected, or when insufficient idle symbols are detected.
3.2.4.3
10BASE-T
In 10BASE-T mode, the recovered 10BASE-T signal is decoded from Manchester to
NRZ, and then aligned. The alignment is necessary to insure that the start of frame
delimiter (SFD) is aligned to the nibble boundary.
3.2.5
Electrical Interface
The input and output buffers are internally terminated to 50 Ω impedance. The output
swing can be adjusted by programming register 26_1.2:0.
CML Outputs
Internal bias¹
50 ohm
50 ohm
S_OUTP
S_OUTN
S_INP
CML Inputs
Internal bias¹
50 ohm
I_sink
1. Internal bias is generated from the
AVDDH supply and is typically 1.4V.
Figure 7. CML I/Os
Internal bias
S_INN
50 ohm
20