82845PE Datasheet, PDF (88/176 Pages) Intel Corporation – 82845GE Graphics and Memory Controller Hub (GMCH) and 82845PE Memory Controller Hub (MCH)

Register Description
3.5.3
Integrated Graphics Device Registers (Device 2)
(Intel^® 82845GE only)
The Integrated Graphics Device registers are in Device 2. This section contains the PCI
configuration registers listed in order of ascending offset address. Table 3-5 provides the register
address map for this device.
Note: The Device 2 registers are in the 82845GE only. They are not in the 82845PE.
Table 3-5. Integrated Graphics Device Register Address Map (Device2) (Intel^® 82845GE only)
Address
Offset
00–01h
02–03h
04–05h
06–07h
08h
09–0Bh
0Ch
0Dh
0Eh
0Fh
10–13h
14–17h
18–2Bh
2C–2Dh
2E–2Fh
30–33h
34h
35–3Bh
3Ch
3Dh
3Eh
3Fh
40–CFh
D0–D1h
D2–D3h
D4–D5h
D6–FFh
Symbol
Register Name
VID2
DID2
PCICMD2
PCISTS2
Vendor Identification
Device Identification
PCI Command
PCI Status
RID2
Revision Identification
CC
CLS
MLT2
HDR2
—
GMADR
MMADR
—
SVID2
SID2
ROMADR
CAPPOINT
—
INTRLINE
INTRPIN
MINGNT
MAXLAT
—
PMCAPID
PMCAP
PMCS
—
Class Code
Cache Line Size
Master Latency Timer
Header Type
Intel Reserved
Graphics Memory Range Address
Memory Mapped Range Address
Intel Reserved
Subsystem Vendor ID
Subsystem ID
Video Bids ROM Base Address
Capabilities Pointer
Intel Reserved
Interrupt Line
Interrupt Pin
Minimum Grant
Maximum Latency
Intel Reserved
Power Management Capabilities ID
Power Management Capabilities
Power Management Control
Intel Reserved
Default
Value
8086h
2562h
0000h
0090h
see register
description
030000h
00h
00h
00h
—
00000008h
00000000h
—
0000h
0000h
00000000h
D0h
—
00h
01h
00h
00h
—
0001h
0021h
0000h
—
Access
RO
RO
RO, R/W
RO, R/WC
RO
RO
RO
RO
RO
—
R/W, RO
R/W, RO
—
R/WO
R/ WO
R/W, RO
RO
—
R/W
RO
RO
RO
—
RO
RO
R/W, RO
—
88
Intel^® 82845GE/82845PE Datasheet