82845PE Datasheet, PDF (140/176 Pages) Intel Corporation – 82845GE Graphics and Memory Controller Hub (GMCH) and 82845PE Memory Controller Hub (MCH)

Functional Description
5.6.5
5.7
Monitor State Control (Intel^® 82845GE only)
• D0 (On): In this state, both HSYNC and VSYNC are pulsed.
• D1 (Standby): The D1 monitor state is the standby mode. VSYNC is pulsed.
• D2 (Suspend): The D2 monitor state is the suspend mode. HSYNC is pulsed.
• D3 (Off): The D3 power state is the off mode. HSYNC and VSYNC are not pulsed in this
state.
Clocking
Figure 5-2 shows a block diagram of an 845GE/845PE chipset-based system. The (G)MCH has the
following clocks:
• 100/133 MHz, Spread spectrum, Low voltage (0.7 V) Differential HCLKP/HCLKN for PSB
• 66.667 MHz, Spread spectrum, 3.3 V GCLKIN for hub interface and AGP
• 48 MHz, Non-Spread spectrum, 3.3 V DREFCLK for the Display frequency syntheses
(82845GE only)
• Up to 85 MHz, 1.5 V DVOBC_CLKINT for TV-Out mode (82845GE only)
The (G)MCH has inputs for a low voltage, differential pair of clocks called HCLKP and HCLKN.
These pins receive a host clock from the external clock synthesizer. This clock is used by the host
interface and system memory logic. For the 82845GE, the graphics engine also uses this clock.
For the 82845GE, the graphics core and display interfaces are asynchronous to the rest of the
GMCH. The graphics core runs at 266 MHz. The display PLL uses the Non-Spread Spectrum
48 MHz input to generate a frequency range of 12 MHz–350 MHz.
140
Intel^® 82845GE/82845PE Datasheet