82845PE Datasheet, PDF (37/176 Pages) Intel Corporation – 82845GE Graphics and Memory Controller Hub (GMCH) and 82845PE Memory Controller Hub (MCH)

Signal Description
2.12 Reset States
2.12.1 Full and Warm Reset States
Figure 2-3. Full and Warm Reset Waveforms
ICH4 Power
ICH4 PWROK In
ICH4 PCIRST# Out
(G)MCH RSTIN# In
(G)MCH
CPURST# Out
(G)MCH Power
(G)MCH PWROK In
1 ms min
Write on CF9h
1 ms min
(G)MCH Reset State Unknown Full Reset Warm Reset
Running
1 ms min
1 ms min
Warm Reset
Running
All register bits assume their default values during full reset. A full reset occurs when PCIRST#
((G)MCH RSTIN#) is asserted and PWROK is deasserted. A warm reset occurs when PCIRST#
((G)MCH RSTIN#) is asserted and PWROK is also asserted. The following table describes the
reset states.
Reset State
Full Reset
Warm Reset
Does not Occur
Normal Operation
RSTIN#
L
L
H
H
PWROK
L
H
L
H
Intel^® 82845GE/82845PE Datasheet
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