BD82QM67-SLJ4M Datasheet, PDF (791/934 Pages) Intel Corporation – Intel® 6 Series Chipset and Intel® 6 Series Chipset and

PCI Express* Configuration Registers
19.1.51
SMSCS—SMI/SCI Status Register
(PCI Express*—D28:F0/F1/F2/F3/F4/F5/F6/F7)
Address Offset: DCh–DFh
Default Value: 00000000h
Attribute:
Size:
R/WC
32 bits
Bit
31
30
29:5
Description
Power Management SCI Status (PMCS) — R/WC.
1 = PME control logic needs to generate an interrupt, and this interrupt has been
routed to generate an SCI.
Hot Plug SCI Status (HPCS) — R/WC.
1 = Hot-Plug controller needs to generate an interrupt, and has this interrupt been
routed to generate an SCI.
Reserved
Hot Plug Link Active State Changed SMI Status (HPLAS) — R/WC.
4 1 = SLSTS.LASC (D28:F0/F1/F2/F3/F4/F5/F6/F7:5A, bit 8) transitioned from 0-to-1,
and MPC.HPME (D28:F0/F1/F2/F3/F4/F5/F6/F7:D8, bit 1) is set. When this bit is
set, an SMI# will be generated.
3:2 Reserved
Hot Plug Presence Detect SMI Status (HPPDM) — R/WC.
1 1 = SLSTS.PDC (D28:F0/F1/F2/F3/F4/F5/F6/F7:5A, bit 3) transitioned from 0-to-1,
and MPC.HPME (D28:F0/F1/F2/F3/F4/F5/F6/F7:D8, bit 1) is set. When this bit is
set, an SMI# will be generated.
Power Management SMI Status (PMMS) — R/WC.
0
1 = RSTS.PS (D28:F0/F1/F2/F3/F4/F5/F6/F7:60, bit 16) transitioned from 0-to-1, and
MPC.PMME (D28:F0/F1/F2/F3/F4/F5/F6/F7:D8, bit 1) is set.
Datasheet
791