BD82QM67-SLJ4M Datasheet, PDF (322/934 Pages) Intel Corporation – Intel® 6 Series Chipset and Intel® 6 Series Chipset and

Electrical Characteristics
Table 8-8. DC Input Characteristics (Sheet 3 of 3)
Symbol
Parameter
Digital Display Port Auxiliary
VAUX-Diff-P-P ^{Signal peak-to-peak voltage}
at receiving device
VIL_XTAL25
VIH_XTAL25
VIMIN17-
Gen3i
Minimum Input Voltage
Maximum Input Voltage
Minimum Input Voltage -
6.0 Gb/s internal SATA
VIMAX17-
Gen3i
Maximum Input Voltage -
6.0 Gb/s internal SATA
Min
0.32
-0.25
0.7
240
—
Max
1.36
0.15
1.2
—
1000
Unit
Notes
Vdiffp-p
V
12
V
12
mVdiffp-p
5
mVdiffp-p
5
NOTES:
1.
V_DI = | USBPx[P] – USBPx[N]
2.
Includes VDI range
3.
Applies to Low-Speed/Full-Speed USB
4.
PCI Express mVdiff p-p = 2*|PETp[x] – PETn[x]|
5.
SATA Vdiff, RX (VIMAX10/MIN10) is measured at the SATA connector on the receiver side (generally, the
motherboard connector), where SATA mVdiff p-p = 2*|SATA[x]RXP – SATA[x]RXN|.
6.
VccRTC is the voltage applied to the VccRTC well of the PCH. When the system is in a G3 state, this is
generally supplied by the coin cell battery, but for S5 and greater, this is generally VccSus3_3.
7.
CL_Vref = 0.12*(VccSus3_3).
8.
This is an AC Characteristic that represents transient values for these signals.
9.
Applies to High-Speed USB 2.0.
10. 3.3 V refers to VccSus3_3 for signals in the suspend well, Vcc3_3 for signals in the core well and to
VccDSW3_3 for signals in the DSW well. See Table 3-2, or Table 3-3 for signal and power well association.
11. 1.05 V refers to VccIO or VccCore for signals in the core well and to VccASW for signals in the ME well. See
Table 3-2 or Table 3-3 for signal and power well association.
12. Vpk-pk min for XTAL25 = 500 mV.
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Datasheet