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BD82QM67-SLJ4M Datasheet, PDF (450/934 Pages) Intel Corporation – Intel® 6 Series Chipset and Intel® 6 Series Chipset and | |||
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LPC Interface Bridge Registers (D31:F0)
Table 13-1. LPC Interface PCI Register Address Map (LPC I/FâD31:F0) (Sheet 2 of 2)
Offset
88hâ8Bh
8Châ8Eh
90hâ93h
94hâ97h
98hâ9Bh
A0hâCFh
D0hâD3h
D4hâD5h
D8hâD9h
Mnemonic
Register Name
GEN2_DEC LPC I/F Generic Decode Range 2
GEN3_DEC LPC I/F Generic Decode Range 3
GEN4_DEC LPC I/F Generic Decode Range 4
ULKMC
USB Legacy Keyboard / Mouse
Control
LGMR
LPC I/F Generic Memory Range
Power Management (See
Section 13.8.1)
BIOS_SEL1 BIOS Select 1
BIOS_SEL2 BIOS Select 2
BIOS_DEC_EN1 BIOS Decode Enable 1
DCh
BIOS_CNTL BIOS Control
E0hâE1h
E2h
E3h
E4hâE7h
FDCAP
FDLEN
FDVER
FVECIDX
Feature Detection Capability ID
Feature Detection Capability
Length
Feature Detection Version
Feature Vector Index
E8hâEBh
FVECD
Feature Vector Data
F0hâF3h
RCBA
Root Complex Base Address
Default
00000000h
00000000h
00000000h
00002000h
00000000h
Attribute
R/W
R/W
R/W
RO, R/WC,
R/W
R/W
00112233h
4567h
FFCFh
00h
0009h
0Ch
10h
00000000h
See
Description
00000000h
R/W, RO
R/W
R/W, RO
R/WLO, R/W,
RO
RO
RO
RO
R/W
RO
R/W
13.1.1
VIDâVendor Identification Register (LPC I/FâD31:F0)
Offset Address: 00hâ01h
Default Value: 8086h
Lockable:
No
Attribute:
Size:
Power Well:
RO
16-bit
Core
Bit
15:0
Description
Vendor ID â RO. This is a 16-bit value assigned to Intel. Intel VID = 8086h
13.1.2
DIDâDevice Identification Register (LPC I/FâD31:F0)
Offset Address: 02hâ03h
Default Value: See bit description
Lockable:
No
Attribute:
Size:
Power Well:
RO
16-bit
Core
Bit
15:0
Description
Device ID â RO. This is a 16-bit value assigned to the PCH LPC bridge. See the
Intel® 6 Series Chipset and Intel® C200 Series Chipset Specification Update for the
value of the DID Register.
450
Datasheet
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