BD82QM67-SLJ4M Datasheet, PDF (690/934 Pages) Intel Corporation – Intel® 6 Series Chipset and Intel® 6 Series Chipset and

Integrated Intel^® High Definition Audio Controller Registers
17.1.1.7
SCC—Sub Class Code Register
(Intel^® High Definition Audio Controller—D27:F0)
Address Offset: 0Ah
Default Value: 03h
Attribute:
Size:
RO
8 bits
Bit
7:0
Sub Class Code (SCC) — RO.
03h = Audio Device
Description
17.1.1.8
BCC—Base Class Code Register
(Intel^® High Definition Audio Controller—D27:F0)
Address Offset: 0Bh
Default Value: 04h
Attribute:
Size:
RO
8 bits
Bit
7:0
Base Class Code (BCC) — RO.
04h = Multimedia device
Description
17.1.1.9
CLS—Cache Line Size Register
(Intel^® High Definition Audio Controller—D27:F0)
Address Offset: 0Ch
Default Value: 00h
Attribute:
Size:
R/W
8 bits
Bit
Description
7:0
Cache Line Size — R/W. Implemented as R/W register, but has no functional impact to
the PCH
17.1.1.10
LT—Latency Timer Register
(Intel^® High Definition Audio Controller—D27:F0)
Address Offset: 0Dh
Default Value: 00h
Attribute:
Size:
RO
8 bits
Bit
Description
7:0 Latency Timer — RO. Hardwired to 00
17.1.1.11
HEADTYP—Header Type Register
(Intel^® High Definition Audio Controller—D27:F0)
Address Offset: 0Eh
Default Value: 00h
Attribute:
Size:
RO
8 bits
Bit
Description
7:0 Header Type — RO. Hardwired to 00.
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