PXF4333 Datasheet, PDF (45/361 Pages) Infineon Technologies AG – ABM 3G ATM Buf fer Manager

ABM-3G
PXF 4333 V1.1
Functional Description
ARC
cells in
Buffer
Manager
D
E
M
U
X
Empty Cell Cycles
Global Real Time Bypass
Scheduler Block #127
Scheduler Block #1
Scheduler Block #0
cells out
S
W
B
F
S
Q
WFQ
Queue with Shaping Function
Scheduler Rate Shaping
Cyclic Mux
Weighted Fair Queueing Scheduler
Strict Priority Mux
Figure 3-3 Logical Block Diagram (One Direction)
3.1.1 Throughput and Speedup
At a given clock frequency, applied to the ABM-3G UTOPIA interfaces and the ABM-3G
core, the core is the limiting factor for throughput because it needs 32 clock cycles per
cell as opposed to UTOPIA, which needs only 27+2. The available speedup in the
ABM-3G relative to STM-4/OC12 transmission rates is shown in Table 3-4.
Table 3-4 Maximum ABM-3G Throughput and Speedup
Clock
Frequency
ABM-3G core Throughput Speedup relative to
[Mbit/s]
STM-4/OC12 (599.04 Mbit/s)
(53 Byte Cells)
51.84
686.88
1.146
Data Sheet
45
2001-12-17