PXF4333 Datasheet, PDF (272/361 Pages) Infineon Technologies AG – ABM 3G ATM Buf fer Manager

ABM-3G
PXF 4333 V1.1
Register Description
Register 79 USCEN2/DSCEN2
Upstream/Downstream Scheduler Block Enable 2 Registers
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Read/Write
0000_H
USCEN2
AA_H
DSCEN2 C2_H
Written by CPU for global Scheduler configuration
Bit
15
14
13
12
11
10
9
8
SchedEn(47:40)
Bit
7
6
5
4
3
2
1
0
SchedEn(39:32)
SchedEn(47:32)
Scheduler Block Enable
Each bit position enables/disables the respective Scheduler Block
(47..32):
1
Scheduler Block enabled
0
Scheduler Block disabled
Data Sheet
272
2001-12-17