PXF4333 Datasheet, PDF (297/361 Pages) Infineon Technologies AG – ABM 3G ATM Buf fer Manager

7.2.25 Interrupt Status/Mask Registers
Register 101 ISRU
Interrupt Status Register Upstream
ABM-3G
PXF 4333 V1.1
Register Description
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Read/Write
0000_H
ISRU
E3_H
Read by CPU to evaluate interrupt events related to the
upstream core. Interrupt indications must be cleared by writing
a 1 to the respective bit locations; writing a 0 has no effect;
Bit
15
14
13
12
11
10
9
8
Unused BCFGE QIDINV BUFER LCI PARITY SOCER BUFER
1
INVAL ER
2
Bit
7
6
5
4
3
2
1
0
BUFER CDVOV MUXOV ^AAL5 RMCER BIP8ER BUFER reserve
3
COL
4
d
BCFGE
Buffer Configuration Error upstream
QIDINV
This interrupt is generated if the ABM-3G tries to write a cell into a
disabled queue. The cell is discarded in this case.
(Typically occurs on queue configuration errors.)
BUFER1
Unexpected buffer error number 1. Should never occur in normal
operation. Immediate reset of the chip recommended.
LCIINVAL
Error when performing the internal address reduction
The cell is discarded.
PARITYER
Parity error at UTOPIA Receive Upstream (PHY) Interface
detected.
Data Sheet
297
2001-12-17