PXF4333 Datasheet, PDF (341/361 Pages) Infineon Technologies AG – ABM 3G ATM Buf fer Manager

ABM-3G
PXF 4333 V1.1
Electrical Characteristics
8.4.1.2 Microprocessor Read Cycle Timing (Intel)
•
MPADR
20
MPCS
21
MPRD
31
22
23
MPRDY
29
24
MPDAT
28
27
25
32
26
30
Figure 8-3 Microprocessor Interface Read Cycle Timing (Intel)
Table 8-6 Microprocessor Interface Read Cycle Timing (Intel)
No. Parameter
Limit Values
Unit
Min
Typ
Max
20 MPADR setup time before MPCS 0
ns
low
21 MPCS setup time before MPRD low 0
ns
22 MPRDY low delay after MPRD low 0
20
ns
23 Pulse width MPRDY low
4 SYSCLK
cycles
5 SYSCLK
cycles
24 MPDAT valid before MPRDY high
5
ns
25 MPRDY high to MPRD high
5
ns
26 MPDAT hold time after MPRD high 2
ns
27 MPCS hold time after MPRD high
5
ns
28 MPADR hold time after MPRD high 5
ns
29 MPRD low to MPDAT low impedance 0
15
ns
30 MPRD high to MPDAT high impedance 0
17
ns
31 MPCS low to MPRDY low impedance 0
ns
32 MPCS high to MPRDY high
impedance
15
ns
Data Sheet
341
2001-12-17