PXF4333 Datasheet, PDF (345/361 Pages) Infineon Technologies AG – ABM 3G ATM Buf fer Manager

ABM-3G
PXF 4333 V1.1
Electrical Characteristics
8.4.3 UTOPIA Interface
The AC characteristics of the UTOPIA Interface fulfill the standard of [3] and [4]. Setup
and hold times of the 50 MHz UTOPIA Specification are valid. According to the UTOPIA
Specification, the AC characteristics are based on the timing specification for the
receiver side of a signal. The setup and the hold times are defined with regards to a
positive clock edge, see Figure 8-6.
Taking into account the actual clock frequency (up to the maximum frequency), the
corresponding (min. and max.) transmit side “clock to output” propagation delay
specifications can be derived. The timing references (tT5 to tT12) are according to the
data found in Table 8-9 through Table 8-12.
Note: The UTOPIA Receive Interface backplane-side is optimized for operation up to
60 MHz UTOPIA clock frequency to achieve a speed-up factor of 1.25 in
bandwidth accepted from the backplane (respective values provided in brackets).
•
Clock
Signal
84, 86
85, 87
input setup to clock input hold from clock
Figure 8-6 Setup and Hold Time Definition (Single- and Multi-PHY)
Figure 8-7 shows the tristate timing for the multi-PHY application (multiple PHY devices,
multiple output signals are multiplexed together).
•
Clock
88
89
Signal
90
91
Figure 8-7
signal going low
impedance from clock
signal going low
impedance to clock
signal going high signal going high
impedance from clock impedance to clock
Tristate Timing (Multi-PHY, Multiple Devices Only)
Data Sheet
345
2001-12-17