PXF4333 Datasheet, PDF (151/361 Pages) Infineon Technologies AG – ABM 3G ATM Buf fer Manager

ABM-3G
PXF 4333 V1.1
Register Description
Table 7-2 ABM-3G Registers Overview (cont’d)
Addr Register
(hex)
Description
Reset µP
value
See
page
(hex)
7B/9B -
Reserved Register
0000 R/W -
7C/9C -
Reserved Register
0000 R/W -
7D/9D -
Reserved Register
0000 R/W -
7E/9E -
Reserved Register
0000 R/W -
7F/9F -
Reserved Register
0000 R/W -
Scheduler Block Configuration Table Transfer/Mask Registers SDRAM Refresh
Registers UTOPIA Port Select of Common Real Time Queue Registers
A0/B8 USADR/
DSADR
Upstream/Downstream SCTI Address
Registers
0000 R/W 259
A1/B9 USCTI/
DSCTI
Upstream/Downstream SCTI Transfer
Registers
0000 R/W 260
A2/BA UECRI/
DECRI
Upstream/Downstream Empty Cycle
Rate Integer Part Registers
0000 R/W 263
A3/BB UECRF/
DECRF
Upstream/Downstream Empty Cycle
Rate Fractional Part Registers
0000 R/W 264
A4/BC UCRTQ/
DCRTQ
Upstream/Downstream Common Real
Time Queue UTOPIA Port Select
Registers
0000 R/W 265
A5/BD USCTFM/
DSCTFM
Upstream/Downstream SCTF Mask
Registers
0000 R/W 266
A6/BE USCTFT/
DSCTFT
Upstream/Downstream SCTF Transfer 0000 R/W 269
Registers
A7/BF -
Reserved Register
0000 R -
Scheduler Block Enable Registers
A8/C0 USCEN0/
DSCEN0
Upstream/Downstream Scheduler Block 0000 R/W 270
Enable 0 Registers
A9/C1 USCEN1/
DSCEN1
Upstream/Downstream Scheduler Block 0000 R/W 271
Enable 1 Registers
AA/C2 USCEN2/
DSCEN2
Upstream/Downstream Scheduler Block 0000 R/W 272
Enable 2 Registers
AB/C3 USCEN3/
DSCEN3
Upstream/Downstream Scheduler Block 0000 R/W 273
Enable 3 Registers
Data Sheet
151
2001-12-17