PXF4333 Datasheet, PDF (273/361 Pages) Infineon Technologies AG – ABM 3G ATM Buf fer Manager

ABM-3G
PXF 4333 V1.1
Register Description
Register 80 USCEN3/DSCEN3
Upstream/Downstream Scheduler Block Enable 3 Registers
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Read/Write
0000_H
USCEN3
AB_H
DSCEN3 C3_H
Written by CPU for global Scheduler configuration
Bit
15
14
13
12
11
10
9
8
SchedEn(63:56)
Bit
7
6
5
4
3
2
1
0
SchedEn(55:48)
SchedEn(63:48)
Scheduler Block Enable
Each bit position enables/disables the respective Scheduler Block
(63..48):
1
Scheduler Block enabled
0
Scheduler Block disabled
Data Sheet
273
2001-12-17