PXF4333 Datasheet, PDF (349/361 Pages) Infineon Technologies AG – ABM 3G ATM Buf fer Manager

ABM-3G
PXF 4333 V1.1
Electrical Characteristics
Table 8-12 Receive Timing (16-Bit Data Bus, 50 MHz Cell Mode, Multi-PHY)
No. Signal Name DIR Description
Limit Values Unit
Min
Max
86 URXDATD, A<P Input setup to RxClk
4
-
ns
87 ^URXDATU,
Input hold from RxClk
1
-
ns
URXPRTYD,
88 _URXPRTYU,
Signal going low impedance to 4
-
ns
URXSOCD,
RxCLK
89 URXSOCU,
Signal going high impedance 0
-
ns
URXCLAVD,
to RxCLK
90 ^URXCLAVU
Signal going low impedance 1
-
ns
from RxCLK
91
Signal going high impedance 1
-
ns
from RxCLK
Note: The setup and hold times for receive Interfaces deviate for non-standard 60 MHz
operation. Timings are provided on request.
Data Sheet
349
2001-12-17