PXF4333 Datasheet, PDF (271/361 Pages) Infineon Technologies AG – ABM 3G ATM Buf fer Manager

ABM-3G
PXF 4333 V1.1
Register Description
Register 78 USCEN1/DSCEN1
Upstream/Downstream Scheduler Block Enable 1 Registers
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Read/Write
0000_H
USCEN0
A9_H
DSCEN0 C1_H
Written by CPU for global Scheduler configuration
Bit
15
14
13
12
11
10
9
8
SchedEn(31:24)
Bit
7
6
5
4
3
2
1
0
SchedEn(23:16)
SchedEn(31:16)
Scheduler Block Enable
Each bit position enables/disables the respective Scheduler Block
(31..16):
1
Scheduler Block enabled
0
Scheduler Block disabled
Data Sheet
271
2001-12-17