PXF4333 Datasheet, PDF (270/361 Pages) Infineon Technologies AG – ABM 3G ATM Buf fer Manager

7.2.19 Scheduler Block Enable Registers
ABM-3G
PXF 4333 V1.1
Register Description
Register 77 USCEN0/DSCEN0
Upstream/Downstream Scheduler Block Enable 0 Registers
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Read/Write
0000_H
USCEN0
A8_H
DSCEN0 C0_H
Written by CPU for global Scheduler configuration
Bit
15
14
13
12
11
10
9
8
SchedEn(15:8)
Bit
7
6
5
4
3
2
1
0
SchedEn(7:0)
SchedEn(15:0)
Scheduler Block Enable
Each bit position enables/disables the respective Scheduler Block
(15..0):
1
Scheduler Block enabled
0
Scheduler Block disabled
Data Sheet
270
2001-12-17