PXF4333 Datasheet, PDF (356/361 Pages) Infineon Technologies AG – ABM 3G ATM Buf fer Manager

ABM-3G
PXF 4333 V1.1
Test Mode
9
Test Mode
A Test Access Port (TAP) is implemented in the ABM-3G. The essential part of the TAP
is a finite state machine (16 states) controlling the different operational modes of the
boundary scan. Both the TAP controller and boundary scan meet the requirements given
by the JTAG standard: IEEE 1149.1. Figure 9-1 gives an overview about the TAP
controller.
•
TCK
Test Access Port (TAP)
CLOCK
Clock Generation
TRST
Reset
CLOCK
TMS Test
Control
TDI
Data in
TAP Controller
- Finite State Machine
- Instruction Register (4 bit)
- Test Signal Generator
TDO
Enable
Data out
Control
Bus
ID Data out
SS Data
out
Pins
1
2
.
.
.
.
.
.
n
Figure 9-1 Block Diagram of Test Access Port and Boundary Scan Unit
If no boundary scan operation is planned, TRST must be connected with V_SS. TMS and
TDI do not need to be connected since pull-up transistors ensure high input levels in this
case. Nevertheless, it is good practice to set the unused inputs to defined levels.
In this case, if the JTAG is not used:
TMS = TCK = ‘1’ is recommended.
Test handling (boundary scan operation) is performed via the pins TCK (Test Clock),
TMS (Test Mode Select), TDI (Test Data Input), and TDO (Test Data Output) when the
TAP controller is not in its reset state; i.e., TRST is connected to V_DD3 or it remains
unconnected due to its internal pull up. Test data at TDI are loaded with a clock signal
connected to TCK. ‘1’ or ‘0’ on TMS causes a transition from one controller state to
another; constant ‘1’ on TMS leads to normal operation of the chip.
An Input pin (I) uses one boundary scan cell (data in); an Output pin (O) uses two cells
(data out, enable); and an I/O-pin (I/O) uses three cells (data in, data out, enable). Note
that most functional output and input pins of the ABM-3G are tested as I/O pins in
boundary scan, thus using three cells. The boundary scan unit of the ABM-3G contains
Data Sheet
356
2001-12-17