PXF4333 Datasheet, PDF (252/361 Pages) Infineon Technologies AG – ABM 3G ATM Buf fer Manager

ABM-3G
PXF 4333 V1.1
Register Description
masked). In case of Read operation, the dedicated xQPT2T0..xQPT2T3 register bit will
be overwritten by the respective QPT1 table entry bit value. In case of Write operation,
the dedicated xQPT2T0..xQPT2T3 register bit will modify the respective QPT1 table
entry bit value.
The Read or Write process is controlled by the Memory Address Register (MAR). The 5
LSBs (= Bit 4..0) of the MAR register select the memory/table that will be accessed; to
select the QPT table bit field MAR(4:0) must be set to:
11_H for QPT2 upstream table,
19_H for QPT2 downstream table.
Bit 5 of MAR starts the transfer and is cleared automatically after execution.
Table 7-19 WAR Register Mapping for QPT Table Access
Bit
15
14
13
12
11
10
9
8
Unused(2:0)
QueueSel(12:8)
Bit
7
6
5
4
3
2
1
0
QueueSel(7:0)
QueueSel(12:0) Selects one of the 8192 queue parameter table entries.
Data Sheet
252
2001-12-17