PXF4333 Datasheet, PDF (178/361 Pages) Infineon Technologies AG – ABM 3G ATM Buf fer Manager

ABM-3G
PXF 4333 V1.1
Register Description
Register 17 UMAC/DMAC
Upstream/Downstream Maximum Occupation Capture Registers
CPU Accessibility: Read only, self-clearing on Read
Reset Value:
Offset Address:
Typical Usage:
0000_H
UMAC
26_H
Read by CPU
DMAC
27_H
Bit
15
14
13
12
11
10
9
8
UMAC/DMAC(17:10)
Bit
7
6
5
4
3
2
1
0
UMAC/DMAC(9:2)
UMAC(17:2)
DMAC(17:2)
Upstream Maximum Occupation Capture Counter
Downstream Maximum Occupation Capture Counter
These bit fields represent the most significant 16 bits of the internal
18-bit wide counters reflecting the absolute maximum number of
cells stored in the respective external cell buffer since the last Read
access (peak cell filling level within measurement interval).
The CPU determines the maximum number of cells with a
granularity of 4 by reading register UMAC/DMAC and left shifting
the value by 2:
max_level(17:0):= (xMAC(17:2) << 2)
The counter value is automatically cleared to 0000_H after Read.
Data Sheet
178
2001-12-17