PXF4333 Datasheet, PDF (158/361 Pages) Infineon Technologies AG – ABM 3G ATM Buf fer Manager

7.2.3
ABM-3G
PXF 4333 V1.1
Register Description
Cell Insertion/Extraction and AAL5 Control Registers
Register 3 UA5TXHD0/DA5TXHD0
Upstream/Downstream AAL5 Transmit Header 0 Registers
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Read/Write
0000_H
UA5TXHD0 05_H
Written by CPU
DA5TXHD0 15_H
Bit
15
14
13
12
11
10
9
8
LCI(11:4),
VPI(11:4) or GFC(3:0) | VPI(7:4),
LCI(11:4),
VPI(11:4) or GFC(3:0) | VPI(7:4),
Bit
7
6
5
4
3
2
1
0
LCI(3:0),
VPI(3:0),
LCI(3:0),
VPI(3:0)
VCI(15:12),
LCI(15:12),
VCI(15:12),
VCI(15:12)
•
First 16-bit word of an ATM cell.
The ABM-3G does not interpret these bit fields, but copies them into ATM cells that are
inserted during AAL5 packet segmentation process. Inserted cells are forwarded to the
ABM-3G like any cell received by the respective UTOPIA Interface. Thus the bit field
usage must comply to the selected LCI mapping mode in the particular application.
VPI(11:0)
or
GFC(3:0) |
VPI(7:0)
or
LCI(11:0)
The meaning of this bit field depends on the selected LCI mapping
mode in Register 110: MODE1:
MODE1->LCIMOD(1:0):
’00’
VPI Address translated mode: LCI(11:0)
’01’
VPI transparent mode:
• NNI cell format: 12-bit VPI field
• UNI cell format: 4-bit GFC field and 8-bit VPI field
’10’
VPI Address translated mode: LCI(11:0)
’11’
VPI transparent mode:
• NNI cell format: 12-bit VPI field
• UNI cell format: 4-bit GFC field and 8 bit VPI field
Data Sheet
158
2001-12-17