PXF4333 Datasheet, PDF (100/361 Pages) Infineon Technologies AG – ABM 3G ATM Buf fer Manager

4
Operational Description
ABM-3G
PXF 4333 V1.1
Operational Description
4.1
Basic Device Initialization
The following actions are recommended to be performed after reset to prepare the
ABM-3G chip for operation:
Basic settings
• Configure clocking system (DPLLs)
• Check register reset values
• Initialize SDRAM
• Reset internal tables (RAM)
ABM-3G diagnostic possibilities
• Check all internal RAM and register values
• Check external RAM
Data path setting and initial queueing and scheduling initialization
• Set MODE1 and MODE2 registers
(Uni-directional Mode or Bi-directional Mode)
• Configure UTOPIA Interfaces: modes, number of PHYs
• Set global thresholds
• Initialize traffic class tables
• Set interrupt mask registers
• Programming of Scheduler output rates
• Programming of Empty Cell Rate generator
• Programming of Common Real Time Queue rate
• Assignment of Scheduler Blocks to PHYs at switch egress side
• Assignment of Scheduler Blocks to switch outputs at ingress side
Refer to the detailed register descriptions in Chapter 7 for a complete picture of the
necessary initializations.
4.2
Basic Traffic Management Initialization
To set up a connection, the complete table structure must be established:
LCI → QID → SBID and
LCI → QID → TCID
(see Figure 4-1). Additionally, bandwidth and buffer space reservations must be per-
formed (see below). Depending on the traffic class, special functions must be enabled;
for example: EPD/PPD for UBR.
Data Sheet
100
2001-12-17