HY5FS123235AFCP Datasheet, PDF (73/74 Pages) Hynix Semiconductor – 512M (16Mx32) GDDR4 SDRAM

HY5FS123235AFCP
VENDOR ID, PARITY & SCAN
Vendor ID
The Manufacturers Vendor ID Code, V, is selected by issuing a MODE REGISTER SET command to EMRS(1) with bit
A11 set to 1, and bits A0-A10 and A12 set to the desired values. The DRAM Info command of EXTENDED MODE
REGISTER SET 3 must also be set to Vendor ID by setting bits A6 and A7 to 0. When the Vendor ID function is enabled
the GDDR4 SDRAM will provide its manufacturers vendor ID code on DQ[3:0] and revision identification on DQ[7:4].
The code will be driven onto the DQ bus after the EMRS that set A11 to 1. The DQ bus will be continuously driven until
an EMRS write sets A11 back to 0. The DQ bus will be in a Hi-Z state after tWRIDOFF max. The code can be sampled
by the controller after waiting tWRIDON max and before tWRIDOFF min.
Table 30 Vendor IDs
VENDOR
Reserved
Samsung
Infineon
Elpida
Etron
Nanya
Hynix
Mosel
Winbond
ESMT
Reserved
Reserved
Reserved
Reserved
Reserved
Micron
DQ(3:0)
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
Rev. 1.2 /June. 2008
73