HY5FS123235AFCP Datasheet, PDF (2/74 Pages) Hynix Semiconductor – 512M (16Mx32) GDDR4 SDRAM

HY5FS123235AFCP
Revision History
Revision No.
History
0.0
Defined target spec.
0.1
Inserted AC timing and IDD value
1.0
1. Changed a marking method of tWL on page 57
2. Changed tWR from 24 to 20 on page 58.
3. Changed DLL on/off frequency to 2.5ns on page 57, page 59
(note 9) and page 60 (note 40).
5. Optimized IDD value and AC timing table on page 56, 57.
1.1
1. Revised typoes
1.2
1. Revised typoes on page 67
Draft Date Remark
Aug. 2006
Apr. 2007
Preliminary
Preliminary
May. 2007
May. 2007
Jun. 2008
Rev. 1.2 /June. 2008
2