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HY5FS123235AFCP Datasheet, PDF (63/74 Pages) Hynix Semiconductor – 512M (16Mx32) GDDR4 SDRAM
HY5FS123235AFCP
1.8V I/O Driver Value
The Driver and Termination impedances are derived from the following test conditions under worst case process
corners:
1. Nominal 1.8V (VDD/VDDQ)
2. Power the GDDR4 device and calibrate the output drivers and termination to eliminate process variation at 25.
3. Reduce temperature to 10 recalibrate.
4. Reduce temperature to 0 and take the fast corner measurement
5. Raise temperature to 75 and recalibrate
6. Raise temperature to 85 and take the slow corner measurement
7. Reiterate 2 to 6 with VDD/VDDQ 1.710V
8. Reiterate 2 to 6 with VDD/VDDQ 1.890V
9. All obtained Driver and Termination IV characteristics have to be bounded by the specified MIN and MAX IV
characteristics
Table 23 1.8V I/O Impedances
Pull-Down Characteristic at 40 ohms
Pull-up/Termination Characteristic at 60 ohms
Voltage (V)
MIN (mA)
MAX (mA)
Voltage (V)
MIN (mA)
MAX (mA)
0.1
2.25
2.75
0.1
-1.50
-1.83
0.2
4.50
5.50
0.2
-3.00
-3.67
0.3
6.75
8.25
0.3
-4.50
-5.50
0.4
9.00
11.00
0.4
-6.00
-7.33
0.5
11.25
13.75
0.5
-7.50
-9.17
0.6
13.50
16.50
0.6
-9.00
-11.00
0.7
15.75
19.25
0.7
-10.50
-12.83
0.8
18.00
22.00
0.8
-12.00
-14.67
0.9
20.25
24.75
0.9
-13.50
-16.50
1.0
22.50
27.50
1.0
-15.00
-18.33
1.1
24.75
30.25
1.1
-16.50
-20.17
1.2
27.00
33.00
1.2
-18.00
-22.00
1.3
29.25
35.75
1.3
-19.50
-23.83
1.4
31.50
38.50
1.4
-21.00
-25.67
1.5
33.75
41.25
1.5
-22.50
-27.50
1.6
36.00
44.00
1.6
-24.00
-29.34
1.7
38.25
46.75
1.7
-25.50
-31.17
1.8
40.50
49.50
1.8
-27.00
-33.00
Note: These values aretarget values for the design The desigen does not need to meet these values
but it is redommended that the design fits these curves.
Rev. 1.2 /June. 2008
63