HY5FS123235AFCP Datasheet, PDF (44/74 Pages) Hynix Semiconductor – 512M (16Mx32) GDDR4 SDRAM

HY5FS123235AFCP
WRITE Data Training Sequence
The WRITE data training procedure is almost the same as the READ data training procedure. WRITE data training
does not require the frequency change that is required in READ data training. To make sure the WRITE completes cor-
rectly, the low speed clock frequency is selected for the WRITE operation during the READ data training. Whereas
WRITE data training case does not require such a frequency change because read data is already trained.
Step 1.START of WRITE data training
Step 2. The controller needs to select a DQ(or Byte) to be trained, and then set minimum delay.
Step 3. Issue WRITE command and then READ the data for the validation. During the WRITE and READ
operations, REFRESH commands can be issued if required.
Step 4.Increase a delay step. If the step is not Max. then go to Step 1. Repeat Steps 3~4 until scan all the delay steps.
Step 5. If all DQ(or Byte) is not checked, go to Step 2. Repeat Steps 2~5 until scan all DQs(or bytes)
Step 6. END of WRITE data training
Rev. 1.2 /June. 2008
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