HY5FS123235AFCP Datasheet, PDF (47/74 Pages) Hynix Semiconductor – 512M (16Mx32) GDDR4 SDRAM

HY5FS123235AFCP
T0
T1 Change Frequency of Clock Tm
Tn Tn+1 Tn+2
CK
CK#
t_IS
CKE#
COMMAND NOP NOP NOP
NOP
A0-A6,A9-A11
t_CKE
NOP
Self
Ref.
NOP
NOP
Enter
Self Refresh
Mode
Tp
Tr
Ts Ts+1 Ts+2 Ts+3
t_DL
t_IS
NOP
NOP
MRS NOP NOP NOP NOP
Exit
Self Refresh
Mode
CODE CODE
A8,A7
A8=H A7=L
BA0,BA1
BA0=L
BA1=L
BA2
BA2=L
DONsT CARE
Reset DLL tDL First Command Cycle
Figure 31: DLL is on and new frequency range DLL is on
T0 T1 ^{Change Frequency}
Tm Tm+1 Tn Tn+1 Tn+2
of Clock
CK
CK#
t_IS
CKE#
t_CKE
COMMAND NOP
NOP
NOP
NOP
MRS
NOP
Self
Ref.
NOP
NOP
Enter
Self Refresh
Mode
A0-A6,A9-A11
CODE
Tp
Tr
Ts Ts+1 Tz
t_DL
t_IS
NOP
NOP
NOP
MRS
NOP
NOP
Exit
Self Refresh
Mode
CODE CODE CODE
A8,A7
BA0,BA1
A8=
CODE
BA0=L
BA1=L
A7=L A8=H A7=L
A8=H
BA2
BA2=L
BA2=L
DONsT CARE
Turn DLL on
Reset DLL
tDL First Command Cycle
Figure 32: DLL is off and new frequency range DLL is on
Rev. 1.2 /June. 2008
47