HY5FS123235AFCP Datasheet, PDF (32/74 Pages) Hynix Semiconductor – 512M (16Mx32) GDDR4 SDRAM

HY5FS123235AFCP
Table 8 Truth Table – CKE#
$,&O
H
H
H
H
L
L
L
L
$,&
H
H
L
L
H
H
H
L
$633&/5
45"5&
$0.."/%O
Power-Down
X
Self Refresh
X
Power-Down
SELECT or NOP
Self Refresh
DELECT or NOP
All Banks Idle
DELECT or NOP
Bank(s) Active
DELECT or NOP
All Banks Idle
AUTO REFRESH
See Table 9
"$5*0/O
Maintain Power-Down
Maintain Self Refresh
Exit Power-Down
Exit Self Refresh
Precharge Power-Down Entry
Active Power-Down Entry
Self Refresh Entry
/05&4
5
1-3
Notes
1. CKE#n is the logic state of CKE# at clock edge n; CKE#n-1 was the state of CKE# at the previous clock edge.
2. Current state is the state of the GDDR4 SDRAM immediately prior to clock edge n.
3. COMMANDn is the command registered at clock edge n, and ACTIONn is a result of COMMANDn.
4. All states and sequences not shown are illegal or reserved.
5. DESELECT or NOP commands should be issued on any clock edges occurring during the t_XSRD period.
A minimum of t_DL is needed for the DLL to lock before applying a READ command if the DLL was disabled.
Table 9 Truth Table - Current State Bank n - Command To Bank n
$633&/5
45"5&
Any
Idle
Row Active
Read (Auto Precharge
Disabled)
Write (Auto Precharge
Disabled)
$4 3"4 $"4 8&
$0.."/%"$5*0/
/05&4
H
X
X
X DESELECT (NOP/continue previous operation)
L
H
H
H NO OPERATION (NOP/continue previous operation)
L
L
H
H ACTIVE (select and activate row)
L
L
L
H AUTO REFRESH
4
L
L
L
L MODE REGISTER SET
4
L
H
L
H READ (select column and start READ burst)
6
L
H
L
L WRITE (select column and start WRITE burst)
6
L
L
H
L PRECHARGE (deactivate row in bank or banks)
5
L
H
L
H READ (select column and start new READ burst)
6
L
H
L
L WRITE (select column and start WRITE burst)
6, 8
L
L
H
L PRECHARGE (only after the READ burst is complete)
5
L
H
L
H READ (select column and start READ burst)
6, 7
L
H
L
L WRITE (select column and start new WRITE burst)
6
L
L
H
L PRECHARGE (only after the WRITE burst is complete) 5, 7
Rev. 1.2 /June. 2008
32