HY5FS123235AFCP Datasheet, PDF (48/74 Pages) Hynix Semiconductor – 512M (16Mx32) GDDR4 SDRAM

HY5FS123235AFCP
T0
T1 _{Change Frequency of Clock}
Tm
Tm+1
Tm+2
Tm+3
Tm+4
CK
CK#
CKE#
COMMAND NOP
MRS
NOP
NOP
NOP
NOP
NOP
NOP
NOP
A0-A6,A9-A11
CODE
CODE
A8,A7
A8=CODE
A7=H
BA0,BA1
BA0=H
BA1=L
BA2
BA2=L
Turn DLL off
DONsT CARE
First Command Cycle
Figure 33: DLL is on and new frequency range DLL is off
T0
T1 _{Change Frequency of Clock}
Tm
Tm+1
Tm+2
Tm+3
Tm+4
CK
CK#
CKE#
COMMAND NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
A0-A6,A9-A11
A8,A7
BA0,BA1
BA2
DONsT CARE
First Command Cycle
Figure 34: DLL is off and new frequency range DLL is off
Rev. 1.2 /June. 2008
48