MC908KX2MDWE Datasheet, PDF (42/210 Pages) Freescale Semiconductor, Inc – High-performance M68HC08 architecture, Fully upward-compatible object code with M6805, M146805, and M68HC05 Families

Analog-to-Digital Converter (ADC)
Refer to 17.9 Trimmed Accuracy of the Internal Clock Generator.
Conversion time = ⎯¹⁶⎯^to⎯¹âŽ¯⁷ ⎯^AD⎯^C⎯^c⎯^loc⎯^k ⎯^cy⎯^cle⎯^s
ADC clock frequency
Number of bus cycles = conversion time x bus frequency
3.3.4 Continuous Conversion
In continuous conversion mode, the ADC data register will be filled with new data after each conversion.
Data from the previous conversion will be overwritten whether that data has been read or not.
Conversions will continue until the ADCO bit (ADC status control register, $003C) is cleared. The COCO
bit is set after the first conversion and will stay set until the next write of the ADC status and control register
or the next read of the ADC data register.
3.3.5 Accuracy and Precision
The conversion process is monotonic and has no missing codes. See 17.9 Trimmed Accuracy of the
Internal Clock Generator for accuracy information.
3.4 Interrupts
When the AIEN bit is set, the ADC module is capable of generating a CPU interrupt after each ADC
conversion. A CPU interrupt is generated if the COCO bit (ADC status control register, $003C) is at 0. If
the COCO bit is set, a direct-memory access (DMA) interrupt is generated.
NOTE
Because the MC68HC908KX8 does not have a DMA module, the COCO
bit should not be set while interrupts are enabled (AIEN = 1).
The COCO bit is not used as a conversion complete flag when interrupts are enabled.
3.5 Low-Power Modes
The following subsections describe the low-power modes.
3.5.1 Wait Mode
The ADC continues normal operation during wait mode. Any enabled CPU interrupt request from the ADC
can bring the MCU out of wait mode. If the ADC is not required to bring the MCU out of wait mode, power
down the ADC by setting the ADCH[4:0] bits in the ADC status and control register before executing the
WAIT instruction.
3.5.2 Stop Mode
The ADC module is inactive after the execution of a STOP instruction. Any pending conversion is aborted.
ADC conversions resume when the MCU exits stop mode. Allow one conversion cycle to stabilize the
analog circuitry before attempting a new ADC conversion after exiting stop mode.
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 Data Sheet, Rev. 2.1
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