MC908KX2MDWE Datasheet, PDF (25/210 Pages) Freescale Semiconductor, Inc – High-performance M68HC08 architecture, Fully upward-compatible object code with M6805, M146805, and M68HC05 Families

Monitor ROM
Addr.
$0000
$0001
$0002
Register Name
Port A Data Register ^Read:
(PTA) Write:
See page 106. _Reset:
Port B Data Register ^Read:
(PTB) Write:
See page 108. _Reset:
Unimplemented
Bit 7
0
PTB7
6
0
PTB6
5
0
PTB5
4
3
PTA4
PTA3
Unaffected by reset
PTB4
PTB3
Unaffected by reset
2
PTA2
PTB2
1
PTA1
PTB1
Bit 0
PTA0
PTB0
$0003
Unimplemented
$0004
$0005
$0006
↓
$000C
Data Direction Register A ^Read:
(DDRA) Write:
See page 106. _Reset:
Data Direction Register B ^Read:
(DDRB) Write:
See page 109. _Reset:
0
0
DDRB7
0
Unimplemented
0
0
DDRB6
0
0
0
DDRB5
0
DDRA4
0
DDRB4
0
DDRA3
0
DDRB3
0
DDRA2
0
DDRB2
0
DDRA1
0
DDRB1
0
DDRA0
0
DDRB0
0
Port A Input Pullup Enable ^Read:
0
0
0
PTAPUE4 PTAPUE3 PTAPUE2 PTAPUE1 PTAPUE0
$000D
Register (PTAPUE) Write:
See page 108. _Reset:
0
0
0
0
0
0
0
0
$000E
↓
$0012
Unimplemented
$0013
$0014
$0015
$0016
SCI Control Register 1 ^Read: _{LOOPS ENSCI}
TXINV
M
WAKE
ILTY
PEN
PTY
(SCC1) Write:
See page 125. _Reset:
0
0
0
0
0
0
0
0
SCI Control Register 2 ^Read: _SCTIE
TCIE
SCRIE
ILIE
TE
RE
RWU
SBK
(SCC2) Write:
See page 127. _Reset:
0
0
0
0
0
0
0
0
SCI Control Register 3 ^{Read: R8}
T8
R
(SCC3) Write:
See page 129. _{Reset: U}
U
0
R
ORIE
NEIE
FEIE
PEIE
0
0
0
0
0
SCI Status Register 1 ^{Read: SCTE}
TC
SCRF
IDLE
OR
NF
FE
PE
(SCS1) Write:
See page 130. _Reset:
1
1
0
0
0
0
0
0
= Unimplemented
R = Reserved
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 1 of 5)
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 Data Sheet, Rev. 2.1
Freescale Semiconductor
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