MC908KX2MDWE Datasheet, PDF (109/210 Pages) Freescale Semiconductor, Inc – High-performance M68HC08 architecture, Fully upward-compatible object code with M6805, M146805, and M68HC05 Families

Port B
TxD — SCI Transmit Data Output Bit
The PTB0/TxD pin is the transmit data output for the SCI module. When the enable SCI bit, ENSCI, is
clear, the SCI module is disabled, and the PTB0/TxD pin is available for general-purpose I/O. See
Chapter 12 Serial Communications Interface Module (SCI).
AD3–AD0 — Analog-to-Digital Input Bits
AD3–AD0 are pins used for the input channels to the analog-to-digital converter (ADC) module. The
channel select bits in the ADC status and control register define which port B pin will be used as an
ADC input and overrides any control from the port I/O logic by forcing that pin as the input to the analog
circuitry. See Chapter 3 Analog-to-Digital Converter (ADC).
11.3.2 Data Direction Register B
Data direction register B (DDRB) determines whether each port B pin is an input or an output. Writing a 1
to a DDRB bit enables the output buffer for the corresponding port B pin; a 0 disables the output buffer.
Address: $0005
Bit 7
Read:
DDRB7
Write:
Reset: 0
6
DDRB6
0
5
DDRB5
0
4
DDRB4
0
3
DDRB3
0
2
DDRB2
0
1
DDRB1
0
Figure 11-7. Data Direction Register B (DDRB)
Bit 0
DDRB0
0
DDRB7–DDRB0 — Data Direction Register B Bits
These read/write bits control port B data direction. Reset clears DDRB7–DDRB0, configuring all port
B pins as inputs.
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
NOTE
Avoid glitches on port B pins by writing to the port B data register before
changing data direction register B bits from 0 to 1.
Figure 11-8 shows the port B I/O logic.
READ DDRB ($0005)
WRITE DDRB ($0005)
RESET
WRITE PTB ($0001)
DDRBx
PTBx
PTBx
READ PTB ($0001)
Figure 11-8. Port B I/O Circuit
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 Data Sheet, Rev. 2.1
Freescale Semiconductor
109