MC908KX2MDWE Datasheet, PDF (158/210 Pages) Freescale Semiconductor, Inc – High-performance M68HC08 architecture, Fully upward-compatible object code with M6805, M146805, and M68HC05 Families

Timer Interface Module (TIM)
Addr.
Register Name
Bit 7
6
5
4
3
2
Timer Counter Modulo ^Read: _{Bit 7}
6
5
4
3
2
$0024
Register Low (TMODL) Write:
See page 165. _Reset:
1
1
1
1
1
1
$0025
Timer Channel 0 Status and ^Read:
Control Register (TSC0) Write:
See page 165. _Reset:
CH0F
0
0
CH0IE
0
MS0B
0
MS0A
0
ELS0B
0
ELS0A
0
Timer Channel 0 Register ^Read: _{Bit 15}
14
$0026
High (TCH0H) Write:
See page 168. _Reset:
13
12
11
10
Indeterminate after reset
Timer Channel 0 Register ^Read: _{Bit 7}
6
$0027
Low (TCH0L) Write:
See page 168. _Reset:
5
4
3
2
Indeterminate after reset
Timer Channel 1 Status and ^{Read: CH1F}
CH1IE
0
MS1A ELS1B ELS1A
$0028 Control Register (TSC1) Write: 0
See page 165. _Reset:
0
0
0
0
0
0
Timer Channel 1 Register ^Read: _{Bit 15}
14
$0029
High (TCH1H) Write:
See page 168. _Reset:
13
12
11
10
Indeterminate after reset
Timer Channel 1 Register ^Read: _{Bit 7}
6
$002A
Low (TCH1L) Write:
See page 168. _Reset:
5
4
3
2
Indeterminate after reset
= Unimplemented
Figure 15-3. TIM I/O Register Summary (Continued)
1
1
1
TOV0
0
9
Bit 0
Bit 0
1
CH0MAX
0
Bit 8
1
Bit 0
TOV1
0
9
CH1MAX
0
Bit 8
1
Bit 0
15.4.1 TIM Counter Prescaler
The TIM clock source can be one of the seven prescaler outputs. The prescaler generates seven clock
rates from the internal bus clock. The prescaler select bits, PS2–PS0, in the TIM status and control
register select the TIM clock source.
15.4.2 Input Capture
With the input capture function, the TIM can capture the time at which an external event occurs. When an
active edge occurs on the pin of an input capture channel, the TIM latches the contents of the TIM counter
into the TIM channel registers, TCHxH and TCHxL. The polarity of the active edge is programmable. Input
captures can generate TIM CPU interrupt requests.
15.4.3 Output Compare
With the output compare function, the TIM can generate a periodic pulse with a programmable polarity,
duration, and frequency. When the counter reaches the value in the registers of an output compare
channel, the TIM can set, clear, or toggle the channel pin. Output compares can generate TIM CPU
interrupt requests.
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 Data Sheet, Rev. 2.1
158
Freescale Semiconductor