DS616 Datasheet, PDF (6/60 Pages) Xilinx, Inc – LogiCORE IP PLBV46 PCI Full

LogiCORE IP PLBV46 PCI Full Bridge (v1.04.a)
Example 2 outlines the use of the IPIFBAR parameters sets for the specific address translations of PLB addresses
within the range of a given IPIFBAR to a remote PCI address space.
Example 3 outlines the use of the PCIBAR parameter sets for the address translation of PCI addresses within the
range of a given PCIBAR to a remote PLB address space.
X-Ref Target - Figure 2
PLB Bus
PLB PCI Full Bridge
IPIF
C_IPIFBAR_NUM = 3
BAR_10 BAR_11
IPIFBAR_0 IPIFBAR_1 IPIFBAR_2 IPIFBAR_3 IPIFBAR_4 IPIFBAR_5
Note 1
(high-order
bit sub)
(high-order
bit sub)
(high-order
bit sub)
IPIF to v3.0 LogiCORE Bridge
Addr to PCI Addr to PCI Addr to PCI
Addr to PLB Addr to PLB
(high-order
bit sub)
(high-order
bit sub)
Note 2
v3.0 LogiCORE
C_PCIBAR_NUM = 2
PCIBAR_0 PCIBAR_1 PCIBAR_2
PCI Bus
PBAR_20 PBAR_21 PBAR_22
DS616_02_040407
Figure 2: Translation of Addresses Bus-to-Bus with High-Order Bit Substitution
Example 1
Because address translations are performed only when the PLBV46 PCI Bridge is configured with FIFOs, the
example shown in Figure 2 is for an PLBV46 PCI Bridge configuration with FIFOs only. In this example, it is assumed
that C_INCLUDE_BAROFFSET_REG=0, therefore, the parameters C_IPIFBAR2PCIBAR_N define the high-order
bits for substitution in translating the address on the PLB bus to the PCI bus.
The PLB parameters are C_IPIFBAR_N, C_IPIF_HIGHADDR_N, and C_IPIFBAR2PCIBAR_N for N=0 to 5.
The PCI parameters are C_PCIBAR_LEN_M and C_PCIBAR2IPIFBAR_M for M=0 to 2.
DS616 June 22, 2011
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Product Specification