DS616 Datasheet, PDF (56/60 Pages) Xilinx, Inc – LogiCORE IP PLBV46 PCI Full

LogiCORE IP PLBV46 PCI Full Bridge (v1.04.a)
Device Utilization and Performance Benchmarks
Core Performance
Because the PLBV46 PCI Bridge is a module that is used with other design pieces in the FPGA, the utilization and
timing numbers reported in this section are just estimates. As the PLBV46 PCI Bridge is combined with other pieces
of the FPGA design, the utilization of FPGA resources and timing of the PLBV46 PCI Bridge design varies from the
results reported here.
To analyze the PLBV46 PCI Bridge timing within the FPGA, a design was created that instantiated the PLBV46 PCI
Bridge with the parameters set as outlined in Table 29. The data is shown for Virtex-4 and Virtex-5 devices.
Table 29: PLBV46 PCI Bridge FPGA Performance and Resource Utilization Benchmarks
Parameter Values
Device Resources
Configuration
Description
f_MAX
Total (with BarOffset and
6
3
9
1
3188 2753 4015
4
5
DevNumregs)
Total (with BarOffset and
6
3
7
1
3088 2647 3897
4
5
DevNumregs)
Total (without BarOffset and 6
3
9
1
2892 2504 3660
4
5
DevNum regs)
Total (without BarOffset and 6
3
7
1
2801 2398 3544
4
5
DevNum regs)
Total (with BarOffset and
4
2
9
1
3097 2658 3944
4
5
DevNum regs)
Total (without BarOffset and 4
2
9
0
2749 2383 3499
4
5
DevNum regs)
Note:
1. These benchmark designs contain only the PLBV46 PCI Bridge with registered inputs/outputs with any additional logic.
Benchmark numbers approach the performance ceiling rather that representing performance under typical user conditions.
DS616 June 22, 2011
www.xilinx.com
56
Product Specification