W79E217A Datasheet, PDF (69/207 Pages) Winbond – 8-bit Microcontroller

Preliminary W79E217A Data Sheet
BIT NAME
7-6 -
5 ENVM
4 ECPTF
3 ET3
2 EBK
1 EPWM
0 ESPI
FUNCTION
Reserved.
NVM Interrupt Enable Bit.
0 = Disable NVM interrupt.
1 = Enable NVM interrupt.
Capture Interrupt Enable Bit.
0 = Disable External capture/reload interrupt.
1 = Enable External capture/reload interrupt.
Timer 3 Interrupt Enable Bit.
0 = Disable Timer 3 Interrupt.
1 = Enable Timer 3 Interrupt.
Brake Interrupt Enable Bit.
0 = Brake interrupt disable.
1 = Brake interrupt enable.
PWM Period Interrupt Enable Bit.
0 = PWM period system interrupts disabled.
1 = PWM period system interrupts enabled.
Serial Peripheral Interrupt Enable Bit. Set the ESPI bit to 1 to request a
hardware interrupt sequence each time the SPIF/MODF status flag is set.
0 = SPI system interrupts disabled.
1 = SPI system interrupts enabled.
EXTENDED INTERRUPT PRIORITY 1
Bit:
7
6
5
4
3
-
-
PNVMI PCPTF PT3
Mnemonic: EIP1
BIT NAME
FUNCTION
7-6 -
Reserved.
5 PNVMI NVM interrupt Priority
4 PCPTF Capture/reload Interrupt Priority.
3 PT3
Timer 3 Interrupt Priority.
2 PBKF
PWM Brake Interrupt Priority.
1 PPWMF PWM period Interrupt Priority.
0 PSPI
SPI Interrupt Priority.
2
PBKF
1
PPWMF
0
PSPI
Address: FAh
INPUT CAPTURE 0/PULSE READ COUNTER LOW REGISTER
Bit:
7
6
5
4
3
CCL0.7/ CCL0.6/ CCL0.5/ CCL0.4/ CCL0.3/
PCNTL.7 PCNTL.6 PCNTL.5 PCNTL.4 PCNTL.3
Mnemonic: CCL0/PCNTL
2
CCL0.2/
PCNTL.2
1
0
CCL0.1/ CCL0.0/
PCNTL.1 PCNTL.0
Address: FBh
- 69 -
Publication Release Date: December 14, 2007
Revision A3.0